IP Library Granted Patent US 10,045,434
Granted Patent B2
US 10,045,434 · App. 14/570,701 · Granted Aug 7, 2018

Reducing impedance discontinuities on a printed circuit board (‘PCB’)

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Quick Facts
Patent No.
US 10,045,434
App. No.
14/570,701
Granted
Aug 7, 2018
Kind
B2
Abstract

A printed circuit board (‘PCB’) comprising: an interior socket configured to receive a connector pin of a first electronic component, the connector pin characterized by a pin impedance; a signal trace coupled to the interior socket, the signal trace configured to transmit electrical signals between the first electronic component and other electronic components mounted on the PCB, the signal trace characterized by a trace impedance; and an insulator between the interior socket and a sleeve that surrounds the interior socket, the sleeve physically configured such that an effective pin impedance matches the trace impedance within a predetermined threshold, wherein the effective pin impedance represents the resistance experienced by electrical signals passing through the connector pin when the connector pin is inserted into the interior socket.

Claims (11)

1. A printed circuit board (‘PCB’) comprising:

an interior socket configured to receive, in an interior opening, a connector pin of a first electronic component, the connector pin characterized by a pin impedance;

a signal trace coupled to the interior socket, the signal trace configured to transmit electrical signals between the first electronic component and other electronic components mounted on the PCB, the signal trace characterized by a trace impedance; and

a sleeve radially surrounding said interior socket and an insulator between the interior socket and the sleeve, the sleeve physically configured by removing portions of the sleeve to alter the capacitance of the sleeve such that an effective pin impedance matches the trace impedance within a predetermined threshold, wherein the effective pin impedance represents the resistance experienced by electrical signals passing through the connector pin when the connector pin is inserted into the interior socket.

2. The PCB of claim 1 wherein the PCB is wired such that the sleeve is a signal path.

3. The PCB of claim 1 wherein the PCB is wired such that the sleeve is a return path.

4. The PCB of claim 1 wherein the sleeve is a discontinuous sleeve.

5. The PCB of claim 4 wherein the PCB is wired such that current flows through only one portion of the discontinuous sleeve.

6. The PCB of claim 4 wherein the PCB is wired such that a return current path provided by the discontinuous sleeve wraps around the interior socket.

7. The PCB of claim 1 further comprising a second interior socket configured to receive a second connector pin.

8. The PCB of claim 7 wherein the second connector pin transports electrical signals in a direction that is opposite to a direction that the connector pin transports electrical signals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2025
From: LENOVO GLOBAL TECHNOLOGIES INTERNATIONAL LIMITED
To: LENOVO GLOBAL TECHNOLOGIES SWITZERLAND INTERNATIONAL GMBH
Reel/Frame 069869/0614 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2019
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE LTD.
To: LENOVO GLOBAL TECHNOLOGIES INTERNATIONAL LTD
Reel/Frame 050311/0027 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2014
From: COLETRANE, CANDICE L.; HERRMAN, BRADLEY D.
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034509/0649 →