IP Library Granted Patent US 9,652,338
Granted Patent B2
US 9,652,338 · App. 14/571,383 · Granted May 16, 2017

Dynamic checkpointing systems and methods

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Quick Facts
Patent No.
US 9,652,338
App. No.
14/571,383
Granted
May 16, 2017
Kind
B2
Abstract

A method for determining a delay in a dynamic, event driven, checkpoint interval. In one embodiment, the method includes the steps of determining the number of network bits to be transferred; determining the target bit transfer rate; calculating the next cycle delay as the number of bits to be transferred divided by the target bit transfer rate. In another aspect, the invention relates to a method for delaying a checkpoint interval. In one embodiment, the method includes the steps of monitoring the transfer of a prior batch of network data and delaying a subsequent checkpoint until the transfer of a prior batch of network data has reached a certain predetermined level of completion. In another embodiment, the predetermined level of completion is 100%.

Claims (11)

1. A checkpoint computing system comprising:

a first fault tolerant computing device comprising a primary machine; and

a second computing device; wherein the first computing device and the second computing device are networked,

wherein the primary machine comprises a first checkpointing engine and a first network interface,

wherein the second computing device comprises a second network interface,

wherein the first checkpointing engine delays a checkpoint by a delay interval, irrespective of network protocol and protocol state information, in response to a number of buffered network bits to be transferred N from the first machine to the second machine and a target bit transfer rate R; and

wherein the checkpoint delay interval is canceled in response to pending network traffic exceeding remaining released traffic.

2. The checkpoint computing system of claim 1 wherein the checkpoint delay interval is varied in response to the actual network bit transfer rate.

3. The checkpoint computing system of claim 1 wherein the checkpoint delay interval is equal to a batch size in bits N being transferred divided by the target network delivery rate R.

4. The checkpoint computing system of claim 1 wherein the first checkpointing engine delays the checkpoint in response to a minimum delay.

5. The checkpoint computing system of claim 1 wherein the checkpoint interval delay is equal to a batch size in bits being transferred, divided by the target network delivery rate, plus an additional minimum delay.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (057254/0557) Recorded Aug 29, 2022
From: CERBERUS BUSINESS FINANCE AGENCY, LLC
To: STRATUS TECHNOLOGIES IRELAND LIMITED; STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 061354/0599 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Jun 9, 2021
From: STRATUS TECHNOLOGIES IRELAND LIMITED; STRATUS TECHNOLOGIES BERMUDA LTD.
To: CERBERUS BUSINESS FINANCE AGENCY, LLC, AS COLLATERAL AGENT
Reel/Frame 057254/0557 →
SECURITY INTEREST Recorded Apr 3, 2020
From: STRATUS TECHNOLOGIES IRELAND LIMITED
To: TRUST BANK (AS SUCCESSOR BY MERGER TO SUNTRUST BANK)
Reel/Frame 052316/0371 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2020
From: STRATUS TECHNOLOGIES BERMUDA LTD.
To: STRATUS TECHNOLOGIES IRELAND LTD.
Reel/Frame 052210/0411 →
CHANGE OF ASSIGNEE ADDRESS Recorded Apr 17, 2015
From: STRATUS TECHNOLOGIES BERMUDA LTD.
To: STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 035450/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2015
From: BISSETT, THOMAS D.; LEVEILLE, PAUL A.; CHINTA, SRINIVASU
To: STRATUS TECHNOLOGIES BERMUDA LTD.
Reel/Frame 035308/0861 →