IP Library Granted Patent US 9,659,766
Granted Patent B2
US 9,659,766 · App. 14/577,547 · Granted May 23, 2017

Method for forming semiconductor structure with etched fin structure

Inventor: Shiang-Bau Wang (Pingzchen, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/0223H01L29/66795H01L29/165H01L29/267H01L29/517H01L29/66545H01L29/7848
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Quick Facts
Patent No.
US 9,659,766
App. No.
14/577,547
Granted
May 23, 2017
Kind
B2
Abstract

Methods for forming semiconductor structures are provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a first sidewall layer to cover the first fin structure and the second fin structure over the substrate. The method for manufacturing a semiconductor structure further includes forming a second sidewall layer over the first sidewall layer and etching a top portion of the first fin structure and the first sidewall layer and the second sidewall layer formed over the top portion of the first fin structure to expose a portion of the first fin structure. The method for manufacturing a semiconductor structure further includes oxidizing the exposed portion of the first fin structure to transform the exposed portion of the first fin structure into an oxide structure formed over the first fin structure.

Claims (63)

1. A method for manufacturing a semiconductor structure, comprising:

forming a first fin structure and a second fin structure over a substrate;

forming a first sidewall layer to cover the first fin structure and the second fin structure over the substrate;

forming a second sidewall layer over the first sidewall layer;

etching a top portion of the first fin structure and the first sidewall layer and the second sidewall layer formed over the top portion of the first fin structure to expose a portion of the first fin structure; and

oxidizing the exposed portion of the first fin structure to transform the exposed portion of the first fin structure into an oxide structure formed over the first fin structure.

2. The method for manufacturing a semiconductor structure as claimed in claim 1 , further comprising:

removing the second sidewall layer; and

removing the first sidewall layer and the oxide structure to expose the first fin structure.

3. The method for manufacturing a semiconductor structure as claimed in claim 2 , further comprising:

forming a shallow trench isolation structure around the second fin structure,

wherein the first fin structure is covered by the shallow trench isolation structure.

4. The method for manufacturing a semiconductor structure as claimed in claim 3 , further comprising:

forming a gate structure over the first fin structure and the second fin structure,

wherein the gate structure and the first fin structure are separated by the shallow trench isolation structure.

5. The method for manufacturing a semiconductor structure as claimed in claim 1 , further comprising:

removing the second sidewall layer;

forming an insulating layer to cover the first fin structure and the second fin structure; and

removing an upper portion of the insulating layer to form a shallow trench structure around the second fin structure.

6. The method for manufacturing a semiconductor structure as claimed in claim 5 , further comprising:

forming a gate structure over the first fin structure and the second fin structure,

wherein the gate structure and the first fin structure are separated by the shallow trench structure and the oxide structure.

7. The method for manufacturing a semiconductor structure as claimed in claim 1 , further comprising:

forming an insulating layer to cover the first fin structure and the second fin structure; and

removing an upper portion of insulating layer to form a shallow trench isolation structure around the second fin structure,

wherein the first fin structure is covered by the shallow trench isolation structure.

8. The method for manufacturing a semiconductor structure as claimed in claim 7 , further comprising:

forming a gate structure over the first fin structure and the second fin structure,

wherein the second sidewall layer is in direct contact with the gate structure.

9. The method for manufacturing a semiconductor structure as claimed in claim 1 , wherein the first sidewall layer is made of oxide, and the second sidewall layer is made of nitride.

10. A method for manufacturing a semiconductor structure, comprising:

forming a first fin structure and a second fin structure over a substrate;

forming a sidewall layer over sidewalls of the first fin structure and sidewalls of the second fin structure;

etching a top portion of the first fin structure to expose a portion of the first fin structure;

oxidizing the exposed portion of the first fin structure to transform the exposed portion of the first fin structure into an oxide structure formed over the first fin structure;

forming an isolation structure over the oxide structure over the first fin structure; and

forming a gate structure over the isolation structure and the second fin structure.

11. The method for manufacturing a semiconductor structure as claimed in claim 10 ,

wherein the sidewall layer is formed on a sidewall of the oxide structure, and

wherein the sidewall layer on the sidewall of the oxide structure is in direct contact with the gate structure.

12. The method for manufacturing a semiconductor structure as claimed in claim 10 , wherein the gate structure and the first fin structure are separated by the oxide structure and the isolation structure.

13. The method for manufacturing a semiconductor structure as claimed in claim 12 , wherein the sidewall layer is made of nitride.

14. A method for manufacturing a semiconductor structure, comprising:

forming a first fin structure and a second fin structure over a substrate;

removing a top portion of the first fin structure;

oxidizing the first fin structure after the top portion of the first fin structure is removed; and

forming an isolation structure over the first fin structure; and

forming a gate structure across the second fin structure,

wherein the gate structure and the first fin structure are separated by the isolation structure.

15. The method for manufacturing a semiconductor structure as claimed in claim 14 , further comprising:

forming a sidewall layer over the second fin structure to protect the second fin structure when the first fin structure is oxidized.

16. The method for manufacturing a semiconductor structure as claimed in claim 14 , wherein the first fin structure is oxidized to form an oxide structure.

17. The method for manufacturing a semiconductor structure as claimed in claim 16 , further comprising:

removing the oxide structure before the isolation structure is formed.

18. The method for manufacturing a semiconductor structure as claimed in claim 16 , wherein the first fin structure under the oxide structure has blunt corners at its top portion.

19. The method for manufacturing a semiconductor structure as claimed in claim 14 , further comprising:

forming a first sidewall layer over the second fin structure;

forming a second sidewall layer over the first fin structure; and

removing the second sidewall layer after the first fin structure is oxidized.

20. The method for manufacturing a semiconductor structure as claimed in claim 14 , further comprising:

forming a sidewall layer covering the first fin structure and the second fin structure;

removing a portion of the sidewall layer over the first fin structure when the top portion of the first fin structure is removed; and

removing the sidewall layer after the first fin structure is oxidized.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2014
From: WANG, SHIANG-BAU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Reel/Frame 034595/0235 →
Continuity (1)
Related Publication 20160181360A1 · Jun 23, 2016