IP Library Granted Patent US 9,208,020
Granted Patent B2
US 9,208,020 · App. 14/581,846 · Granted Dec 8, 2015

Efficient error handling mechanisms in data storage systems

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Quick Facts
Patent No.
US 9,208,020
App. No.
14/581,846
Granted
Dec 8, 2015
Kind
B2
Abstract

A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to index system data. Metadata stored along with user data in a memory location can be configured to indicate a logical address associated in a logical-to-physical location mapping with a physical address at which user data and metadata are stored. The data storage system can generate modified versions of logical address indicated by the metadata and determine whether such modified versions match the physical address in the logical-to-physical mapping. Modified versions of the logical address can be generated by flipping one or more bits in the logical address indicated by the metadata. Efficiency can be increased and improved performance can be attained.

Claims (38)

1. A non-volatile data storage system, comprising:

a non-volatile memory array comprising a plurality of physical addresses; and

a controller configured to:

maintain a mapping associating a set of physical addresses of the plurality of physical addresses in the non-volatile memory array with a set of logical addresses,

the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata,

the set of logical addresses including at least a first logical address and a second logical address different from each other,

the mapping indexed by the set of logical addresses; and

when the logical address indicated in the first metadata is not associated with the first physical address, attempt to locate the second logical address corresponding to the first physical address in the mapping based on flipping one or more bits in data read from the first metadata.

2. The non-volatile data storage system of claim 1 , wherein, when an m-bit flipped version of the first metadata does not result in locating the second logical address, the controller is further configured to locate the second logical address based on an (m+1)-bit flipped version of the first metadata, where m is a natural number.

3. The non-volatile data storage system of claim 1 , wherein, when an m-bit flipped version of the first metadata does not result in locating the second logical address, the controller is further configured to locate the second logical address based on any number of bits of flipped versions of the first metadata in any order, where m is a natural number greater than 1.

4. The non-volatile data storage system of claim 1 , wherein the controller is further configured to attempt to locate the second logical address based on flipping two or more bits of data read from the first metadata.

5. The non-volatile data storage system of claim 4 , wherein the controller is further configured to selectively use the bit-flipped versions of the first metadata in attempting to locate the second logical address.

6. The non-volatile data storage system of claim 1 , wherein the controller is further configured to attempt to locate the second logical address in response to determining that the user data stored at the first physical address is unrecoverable.

7. A non-volatile data storage system, comprising:

a non-volatile memory array comprising a plurality of physical addresses; and

a controller configured to:

maintain a mapping associating a set of physical addresses of the plurality of physical addresses in the non-volatile memory array with a set of logical addresses,

the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata,

the set of logical addresses including at least a first logical address and a second logical address different from each other, the mapping indexed by the set of logical addresses; and

when the logical address indicated in the first metadata is not associated with the first physical address, modify at least part of data read from the first metadata and attempt to locate the second logical address corresponding to the first physical address in the mapping based on the modified data.

8. The non-volatile data storage system of claim 7 , wherein the controller is further configured to generate the modified data based at least in part on an order based on a likelihood of the type of error(s) in the first metadata.

9. The non-volatile data storage system of claim 8 , wherein the controller is further configured to attempt to correct more likely errors prior to attempting to correct less likely errors.

10. A controller for a non-volatile data storage system, the controller being configured to:

maintain a mapping associating a set of a plurality of physical addresses stored in a non-volatile memory array with a set of logical addresses,

the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata,

the set of logical addresses including at least a first logical address and a second logical address different from each other, the mapping indexed by the set of logical addresses; and

when the logical address indicated in the first

metadata is not associated with the first physical address, attempt to locate the second logical address corresponding to the first physical address in the mapping based on flipping one or more bits in data read from the first metadata.

11. The controller of claim 10 , wherein, when an m-bit flipped version of the first metadata does not result in locating the second logical address, the controller is further configured to locate the second logical address based on an (m+1)-bit flipped version of the first metadata, where m is a natural number.

12. The controller of claim 10 , wherein, when an m-bit flipped version of the first metadata does not result in locating the second logical address, the controller is further configured to locate the second logical address based on any number of bits of flipped versions of the first metadata in any order, where m is a natural number greater than 1.

13. The controller of claim 10 , wherein the controller is further configured to attempt to locate the second logical address based on flipping two or more bits of data read from the first metadata, and wherein the controller is further configured to selectively use the bit-flipped versions of the first metadata in attempting to locate the second logical address.

14. The controller of claim 10 , wherein the controller is further configured to attempt to locate the second logical address in response to determining that the user data stored at the first physical address is unrecoverable.

15. In a non-volatile data storage system comprising a controller and a non-volatile memory array comprising a plurality of physical addresses, a method of relocating data, the method comprising:

maintaining a mapping associating a set of physical addresses of the plurality of physical addresses in the non-volatile memory array with a set of logical addresses, the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata, the set of logical addresses including at least a first logical address and a second logical address different from each other, the mapping indexed by the set of logical addresses; and

when the logical address indicated in the first metadata is not associated with the first physical address, attempting to locate the second logical address corresponding to the first physical address in the mapping based on flipping one or more bits in data read from the first metadata,

wherein the method is performed under the control of the controller.

16. The method of claim 15 , wherein the attempting comprises generating the modified data based at least in part on flipping one or more bits in the data read from the first metadata.

17. The method of claim 15 , wherein the attempting comprises generating the modified data based at least in part on an order based on a likelihood of the type of error(s) in the first metadata.

Assignments (8)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2015
From: LAM, JOHNNY A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 036250/0007 →