IP Library Granted Patent US 9,569,127
Granted Patent B2
US 9,569,127 · App. 14/583,970 · Granted Feb 14, 2017

Computer instructions for limiting access violation reporting when accessing strings and similar data structures

Inventors: Michael Gschwind (Chappaqua, NY); Brett Olsson (Cary, NC); Raul E. Silvera (Dublin, CA)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F3/0622G06F3/0659G06F3/0673G06F9/3887G06F12/121G06F12/1425G06F13/24G06F2212/1052G06F2212/69
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,569,127
App. No.
14/583,970
Granted
Feb 14, 2017
Kind
B2
Abstract

Embodiments are directed to a method of accessing a data frame. The method includes, based at least in part on a determination that the data frame spans first and second memory blocks, and further based at least in part on a determination that the processor has access to the first and second memory blocks, accessing the data frame. The method includes, based at least in part on a determination that the data frame spans the first and second memory blocks, and based at least in part on a determination that the processor has access to the first memory block but does not have access to the second memory block, accessing a first portion of the data frame that is in the first memory block, and accessing at least one default character as a replacement for accessing a second portion of the data frame that is in the second memory block.

Claims (39)

1. A computer system for accessing a data frame, wherein a first portion of the data frame is in a first memory block, and wherein a second portion of the data frame is in a second memory block, the system comprising:

a processor configured to initiate an access of the data frame;

said processor further configured to access the first portion of the data frame; and

said processor further configured to, based at least in part on a determination that said processor does not have access to the second memory block, access at least one valid default character as a replacement for accessing the second portion of the data frame; and

said processor further configured to, based at least in par on the determination that said processor does not have access to the second memory block, read the first portion of the data frame, read the at least one valid default character, and load the first portion of the data frame and the at least one valid default character to a target location in order to process the first portion of the data frame and the at least one value default character as a valid data frame.

2. The computer system of claim 1 , wherein:

the data frame comprises a null-terminated string having an indeterminate length;

said null-terminated string comprises a data portion and at least one terminator character; and

said at least one terminator character indicates a termination of said null-terminated string.

3. The computer system of claim 1 , wherein said processor is further configured to, based at least in part on a determination that said processor has access to the second memory block, access the second portion of the data frame.

4. The computer system of claim 1 , wherein

said target location comprises a target register; and

said at least one valid default character loaded in said target register represents a termination of a data portion of said data frame.

5. The computer system of claim 4 , wherein said processor is further configured to load the first portion of the data frame and load said at least one valid default character as a serial operation.

6. The computer system of claim 4 , wherein said processor is further configured to load the first portion of the data frame and load said at least one valid default character as a parallel operation.

7. The computer system of claim 6 , wherein said parallel operation comprises a single instruction multiple data (SIMD) operation.

8. The computer system of claim 1 , wherein:

the first memory block comprises a first memory page; and

the second memory block comprises a second memory page.

9. The computer system of claim 1 , wherein said determination that said processor does not have access to the second memory block comprises detecting an access protection violation.

10. The computer system of claim 9 , wherein said detecting said access protection violation comprises detecting that a predetermined bit of an interrupt status register has been set.

11. A computer program product for accessing a data frame, wherein a first portion of the data frame is in a first memory block, and wherein a second portion of the data frame is in a second memory block, the computer program product comprising:

a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions readable by a processor circuit to cause the processor circuit to perform a method comprising:

initiating an access of the data frame;

accessing the first portion of the data frame;

based at least in part on a determination that the program instructions do not have access to the second memory block, accessing at least one valid default character as a replacement for accessing the second portion of the data frame; and

based at least in part on the determination that the program instructions do not have access to the second memory block, reading the first portion of the data frame, reading the at least one valid default character, and loading the first portion of the data frame and the at least one valid default character to a target location in order to process the first portion of the data frame and the at least one valid default character as a valid data frame.

12. The computer program product of claim 11 , wherein:

the data frame comprises a null-terminated string having an indeterminate length;

said null-terminated string comprises a data portion and at least one terminator character; and

said at least one terminator character indicates a termination of said null-terminated string.

13. The computer program product of claim 11 further comprising:

based at least in part on a determination that the program instructions have access to the second memory block, accessing the second portion of the data frame.

14. The computer program product of claim 11 , wherein:

a target register; and

said at least one valid default character loaded in said target register represents a termination of a data portion of said data frame.

15. The computer program product of claim 11 , wherein:

said determination that the program instructions do not have access to the second memory block comprises detecting an access protection violation; and

said detecting said access protection violation comprises detecting that a predetermined bit of an interrupt status register has been set.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2014
From: GSCHWIND, MICHAEL; OLSSON, BRETT; SILVERA, RAUL E.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 034592/0411 →
Continuity (1)
Related Publication 20160188242A1 · Jun 30, 2016