Masking mechanical separations between tiled display panels

1. A tileable display panel, comprising:

an array of display pixels to output a screen image, the array of display pixels including central display pixels near a center of the array of display pixels having a center pixel pitch and perimeter display pixels along a perimeter of the array of display pixels; and

a perimeter region surrounding the array of display pixels, the perimeter region having a first side that is joinable to a second side of another instance of the tileable display panel to form a multi-panel display,

wherein the perimeter region has a width that is greater than at least half the center pixel pitch such that a gap between adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display is greater than the center pixel pitch,

wherein the gap is visually masked by increasing characteristics of the perimeter display pixels adjacent to the gap relative to the same characteristics of the central display pixels, wherein a first characteristic is a pixel pitch of the display pixels such that a perimeter pixel pitch of the perimeter display pixels is greater than the center pixel pitch, wherein a second characteristic is a brightness bias of the display pixels such that the perimeter display pixels along the gap have an increased brightness bias relative to the central display pixels to offset a darkness of the gap.

2. The tileable display panel of claim 1 , wherein the characteristics increase according to a non-linear function with distance from a center of the array of display pixels.

3. The tileable display panel of claim 2 , wherein the characteristics are constant across a center portion of the array of display pixels and increase proximate to the perimeter display pixels.

4. The tileable display panel of claim 1 , further comprising:

a controller coupled to determine whether a given side of the array of display pixels abuts another instance of the tileable display panel and coupled to increase the brightness bias of the perimeter display pixels determined to be adjacent to another instance of the tileable display panel.

5. The tileable display panel of claim 1 , wherein the brightness bias of the display pixels is increased by increasing a size of an emission aperture of the perimeter display pixels relative to the central display pixels.

6. The tileable display panel of claim 5 , further comprising:

pixel circuitry coupled to the perimeter display pixels to control a transparency of the perimeter display pixels,

wherein the pixel circuitry is disposed external to the perimeter display pixels in the perimeter region.

7. The tileable display panel of claim 1 , wherein the central display pixels and the perimeter display pixels have commonly sized emission apertures and wherein the brightness bias of the display pixels is increased by biasing drive signals of the perimeter display pixels differently relative to the central display pixels.

8. The tileable display panel of claim 1 , wherein the perimeter pixel pitch of the perimeter display pixels is approximately equal to the gap between adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display.

9. The tileable display panel of claim 1 , wherein the perimeter pixel pitch of the perimeter display pixels is greater than the center pixel pitch but less than the gap between the adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display.

10. A tileable display panel, comprising:

an array of display pixels to output a screen image, the array of display pixels including central display pixels near a center of the array of display pixels having a center pixel pitch and perimeter display pixels along a perimeter of the array of display pixels; and

a perimeter region surrounding the array of display pixels, the perimeter region having a first side that is joinable to a second side of another instance of the tileable display panel to form a multi-panel display,

wherein the perimeter region has a width that is greater than at least half the center pixel pitch such that a gap between adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display is greater than the center pixel pitch,

wherein the gap is visually masked by changing a pixel pitch of the display pixels across the array of display pixels such that a perimeter pixel pitch of the perimeter display pixels is greater than the center pixel pitch.

11. The tileable display panel of claim 10 , wherein the gap is further visually masked by increasing a brightness bias of the perimeter display pixels adjacent to the gap relative to the brightness bias of the central display pixels to offset a darkness of the gap.

12. The tileable display panel of claim 11 , further comprising:

a controller coupled to determine whether a given side of the array of display pixels abuts another instance of the tileable display panel and coupled to increase the brightness bias of the perimeter display pixels determined to be adjacent to another instance of the tileable display panel.

13. The tileable display panel of claim 11 , wherein the brightness bias of the perimeter display pixels is increased by increasing a size of an emission aperture of the perimeter display pixels relative to the central display pixels.

14. The tileable display panel of claim 13 , further comprising:

pixel circuitry coupled to the perimeter display pixels to control a transparency of the perimeter display pixels,

wherein the pixel circuitry is disposed external to the perimeter display pixels in the perimeter region.

15. The tileable display panel of claim 11 , wherein the central display pixels and the perimeter display pixels have commonly sized emission apertures and wherein the brightness bias of the perimeter display pixels is increased by biasing drive signals of the perimeter display pixels differently relative to the central display pixels.

16. The tileable display panel of claim 11 , wherein the brightness bias is constant across a center portion of the array of display pixels and increases proximate to the perimeter display pixels.

17. A tileable display panel, comprising:

an array of display pixels to output a screen image, the array of display pixels including central display pixels near a center of the array of display pixels having a center pixel pitch and perimeter display pixels along a perimeter of the array of display pixels; and

a perimeter region surrounding the array of display pixels, the perimeter region having a first side that is joinable to a second side of another instance of the tileable display panel to form a multi-panel display,

wherein the perimeter region has a width that is greater than at least half the center pixel pitch such that a gap between adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display is greater than the center pixel pitch,

wherein the gap is visually masked by increasing a characteristic of the perimeter display pixels adjacent to the gap relative to the same characteristic of the central display pixels, wherein the characteristic of the display pixels is a pixel pitch of the display pixels such that a perimeter pixel pitch of the perimeter display pixels is greater than the center pixel pitch.

18. The tileable display panel of claim 17 , wherein the perimeter pixel pitch of the perimeter display pixels is approximately equal to the gap between adjacent perimeter display pixels of the tileable display panel and the other instance of the tileable display panel when forming the multi-panel display.