IP Library Granted Patent US 9,153,576
Granted Patent B2
US 9,153,576 · App. 14/584,793 · Granted Oct 6, 2015

Semiconductor device

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Quick Facts
Patent No.
US 9,153,576
App. No.
14/584,793
Granted
Oct 6, 2015
Kind
B2
Abstract

A semiconductor substrate comprises an IGBT region and a diode region. The IGBT region comprises: an n-type emitter region; a p-type IGBT body region; an n-type IGBT barrier region; an n-type IGBT drift region; a p-type collector region; a first trench; a first insulating layer; and a first gate electrode. The diode region comprises: a p-type diode top body region; an n-type diode barrier region; a p-type diode bottom body region; an n-type cathode region; a second trench; a second insulating layer; and a second gate electrode. An n-type impurity density of a specific part of the diode barrier region making contact with the second insulating layer is higher than an n-type impurity density of the IGBT barrier region.

Claims (59)

1. A semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate comprises an IGBT region and a diode region,

the IGBT region comprises:

an n-type emitter region exposed at a part of a front surface of the semiconductor substrate;

a p-type IGBT body region formed at a deeper position than the emitter region;

an n-type IGBT barrier region formed at a deeper position than the IGBT body region;

an n-type IGBT drift region formed at a deeper position than the IGBT barrier region, having an n-type impurity density lower than that in the IGBT barrier region;

a p-type collector region formed at a deeper position than the IGBT drift region, wherein the collector region is exposed at a rear surface of the semiconductor substrate;

a first trench penetrating the emitter region, the IGBT body region and the IGBT barrier region, wherein a bottom part of the first trench projects into the IGBT drift region;

a first insulating layer covering an inner surface of the first trench; and

a first gate electrode contained in the first trench in a state where the first gate electrode is covered by the first insulating layer,

the diode region comprises:

a p-type diode top body region exposed at the front surface of the semiconductor substrate;

an n-type diode barrier region formed at a deeper position than the diode top body region;

a p-type diode bottom body region formed at a deeper position than the diode barrier region;

an n-type cathode region formed at a deeper position than the diode bottom body region, wherein the cathode region is exposed at the rear surface of the semiconductor substrate;

a second trench penetrating the diode top body region, the diode barrier region and the diode bottom body region, wherein a bottom part of the second trench projects into the cathode region;

a second insulating layer covering an inner surface of the second trench; and

a second gate electrode contained in the second trench in a state where the second gate electrode is covered by the second insulating layer, and

an n-type impurity density of a specific part of the diode barrier region making contact with the second insulating layer is higher than an n-type impurity density of the IGBT barrier region.

2. The semiconductor device as in claim 1 , wherein

the n-type impurity density of the specific part is higher than an n-type impurity density of a part other than the specific part of the diode barrier region.

3. A semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate comprises an IGBT region and a diode region,

the IGBT region comprises:

an n-type emitter region exposed at a part of a front surface of the semiconductor substrate;

a p-type IGBT body region formed at a deeper position than the emitter region;

an n-type IGBT barrier region formed at a deeper position than the IGBT body region;

an n-type IGBT drift region formed at a deeper position than the IGBT barrier region, having an n-type impurity density lower than that in the IGBT barrier region;

a p-type collector region formed at a deeper position than the IGBT drift region, wherein the collector region is exposed at a rear surface of the semiconductor substrate;

a first trench penetrating the emitter region, the IGBT body region and the IGBT barrier region, wherein a bottom part of the first trench projects into the IGBT drift region;

a first insulating layer covering an inner surface of the first trench; and

a first gate electrode contained in the first trench in a state where the first gate electrode is covered by the first insulating layer,

the diode region comprises:

a p-type diode top body region exposed at the front surface of the semiconductor substrate;

an n-type diode barrier region formed at a deeper position than the diode top body region;

a p-type diode bottom body region formed at a deeper position than the diode barrier region;

an n-type cathode region formed at a deeper position than the diode bottom body region, wherein the cathode region is exposed at the rear surface of the semiconductor substrate;

a second trench penetrating the diode top body region, the diode barrier region and the diode bottom body region, wherein a bottom part of the second trench projects into the cathode region;

a second insulating layer covering an inner surface of the second trench; and

a second gate electrode contained in the second trench in a state where the second gate electrode is covered by the second insulating layer, and

the second insulating layer is thicker than the first insulating layer.

4. A semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate comprises an IGBT region and a diode region,

the IGBT region comprises:

an n-type emitter region exposed at a part of a front surface of the semiconductor substrate;

a p-type IGBT body region formed at a deeper position than the emitter region;

an n-type IGBT barrier region formed at a deeper position than the IGBT body region;

an n-type IGBT drift region formed at a deeper position than the IGBT barrier region, having an n-type impurity density lower than that in the IGBT barrier region;

a p-type collector region formed at a deeper position than the IGBT drift region, wherein the collector region is exposed at a rear surface of the semiconductor substrate;

a first trench penetrating the emitter region, the IGBT body region and the IGBT barrier region, wherein a bottom part of the first trench projects into the IGBT drift region;

a first insulating layer covering an inner surface of the first trench; and

a first gate electrode contained in the first trench in a state where the first gate electrode is covered by the first insulating layer,

the diode region comprises:

a p-type diode top body region exposed at the front surface of the semiconductor substrate;

an n-type diode barrier region formed at a deeper position than the diode top body region;

a p-type diode bottom body region formed at a deeper position than the diode barrier region;

an n-type cathode region formed at a deeper position than the diode bottom body region, wherein the cathode region is exposed at the rear surface of the semiconductor substrate;

a second trench penetrating the diode top body region, the diode barrier region and the diode bottom body region, wherein a bottom part of the second trench projects into the cathode region;

a second insulating layer covering an inner surface of the second trench; and

a second gate electrode contained in the second trench in a state where the second gate electrode is covered by the second insulating layer, and

a resistance of a channel formed in the diode bather region is higher than a resistance of a channel formed in the IGBT bather region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 053727/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2014
From: HOSOKAWA, HIROSHI; YAMASHITA, YUSUKE; MACHIDA, SATORU
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 034595/0529 →