IP Library Granted Patent US 9,531,979
Granted Patent B2
US 9,531,979 · App. 14/585,704 · Granted Dec 27, 2016

IC image sensor device with twisted pixel lines and related methods

Inventors: Frédéric Lalanne (Bernin, FR); Christophe Mandier (Grenoble, FR)
Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS; STMICROELECTRONICS (CROLLES 2) SAS
H04N5/378H04N5/374H04N5/3745
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Quick Facts
Patent No.
US 9,531,979
App. No.
14/585,704
Granted
Dec 27, 2016
Kind
B2
Abstract

An IC image sensor device may include image sensing IC pixels arranged in an array, and pixel line pairs coupled to the image sensing IC pixels. The IC image sensor device may include circuitry coupled to the pixel line pairs and configured to operate the array in a global shutter mode. Each pair of the pixel line pairs may include a pair of spaced electrical conductors having a twist.

Claims (53)

1. An integrated circuit (IC) image sensor device comprising:

a plurality of image sensing IC pixels arranged in an array;

a plurality of pixel line pairs coupled to said plurality of image sensing IC pixels, each image sensing IC pixel being directly coupled to a respective pixel line pair; and

circuitry coupled to said plurality of pixel line pairs and configured to operate said array in a global shutter mode;

each pair of said plurality of pixel line pairs comprising a pair of spaced electrical conductors having at least one twist therein.

2. The IC image sensor device of claim 1 wherein the at least one twist comprises a plurality thereof.

3. The IC image sensor device of claim 1 wherein respective twists in adjacent pixel line pairs are in staggered relation to each other.

4. The IC image sensor device of claim 1 wherein each pixel comprises:

a photodiode;

a comparator coupled to said photodiode; and

a reset transistor coupled to said photodiode.

5. The IC image sensor device of claim 1 wherein said pair of spaced electrical conductors comprises parallel spaced electrical conductors.

6. The IC image sensor device of claim 1 wherein said pair of spaced electrical conductors are vertically spaced.

7. The IC image sensor device of claim 1 wherein said circuitry further comprises a processor, and readout circuitry coupled between said plurality of pixel line pairs and said processor.

8. The IC image sensor device of claim 7 wherein said readout circuitry comprises:

first and second transistors coupled to each pair of said plurality of pixel line pairs;

an amplifier coupled to said second transistor; and

logic circuitry coupled downstream from said amplifier.

9. The IC image sensor device of claim further comprising a substrate; and wherein said plurality of pixel line pairs are carried by a periphery of said substrate.

10. An integrated circuit (IC) image sensor device comprising:

a plurality of image sensing IC pixels arranged in an array;

a plurality of pixel line pairs coupled to said plurality of image sensing IC pixels, each image sensing IC pixel being directly coupled to a respective pixel line pair; and

circuitry coupled to said plurality of pixel line pairs and configured to operate said array in a global shutter mode;

each pair of said plurality of pixel line pairs comprising a pair of spaced electrical conductors having a plurality of twists therein, respective twists in adjacent pixel line pairs being in staggered relation to each other.

11. The IC image sensor device of claim 10 wherein each pixel comprises:

a photodiode;

a comparator coupled to said photodiode; and

a reset transistor coupled to said photodiode.

12. The IC image sensor device of claim 10 wherein said pair of spaced electrical conductors comprises parallel spaced electrical conductors.

13. The IC image sensor device of claim 10 wherein said pair of spaced electrical conductors are vertically spaced.

14. The IC image sensor device of claim 10 wherein said circuitry further comprises a processor, and readout circuitry coupled between said plurality of pixel line pairs and said processor.

15. The IC image sensor device of claim 14 wherein said readout circuitry comprises:

first and second transistors coupled to each pair of said plurality of pixel line pairs;

an amplifier coupled to said second transistor; and

logic circuitry coupled downstream from said amplifier.

16. The IC image sensor device of claim 10 further comprising a substrate; and wherein said plurality of pixel line pairs are carried by a periphery of said substrate.

17. A method for making an integrated circuit (IC) image sensor device, the method comprising:

forming a plurality of image sensing IC pixels in an array;

forming a plurality of pixel line pairs coupled to the plurality of image sensing IC pixels, each image sensing IC pixel being directly coupled to a respective pixel line pair; and

coupling circuitry to the plurality of pixel line pairs and configured to operate the array in a global shutter mode, each pair of the plurality of pixel line pairs comprising a pair of spaced electrical conductors having at least one twist therein.

18. The method of claim 17 wherein the at least one twist comprises a plurality thereof.

19. The method of claim 17 further comprising forming respective twists in adjacent pixel line pairs in staggered relation to each other.

20. The method of claim 17 wherein each pixel comprises:

a photodiode;

a comparator coupled to the photodiode; and

a reset transistor coupled to the photodiode.

21. The method of claim 17 wherein the pair of spaced electrical conductors comprises parallel spaced electrical conductors.

22. The method of claim 17 wherein the pair of spaced electrical conductors are vertically spaced.

23. The method of claim 17 wherein the circuitry further comprises a processor, and readout circuitry coupled between the plurality of pixel line pairs and the processor.

24. The method of claim 23 wherein the readout circuitry comprises:

first and second transistors coupled to each pair of the plurality of pixel line pairs;

an amplifier coupled to the second transistor; and

logic circuitry coupled downstream from the amplifier.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (CROLLES 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063276/0569 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (GRENOBLE 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063282/0095 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2015
From: LALANNE, FREDERIC; MANDIER, CHRISTOPHE
To: STMICROELECTRONICS (GRENOBLE 2) SAS; STMICROELECTRONICS (CROLLES 2) SAS
Reel/Frame 035798/0493 →
Continuity (1)
Related Publication 20160191758A1 · Jun 30, 2016