Compact electronic package with MEMS IC and related methods

1. An electronic device comprising:

first and second laterally spaced apart interconnect substrates defining a slotted opening therebetween;

at least one first integrated circuit (IC) in the slotted opening and electrically coupled to at least one of said first and second interconnect substrates;

at least one first other IC over said at least one first IC and electrically coupled to at least one of said first and second interconnect substrates;

said at least one first IC being offset with said at least one first other IC;

an adhesive layer between said at least one first IC and said at least one first other IC;

encapsulation material over said first and second interconnect substrates, said at least one first IC, and said at least one first other IC; and

at least one bond wire directly coupled between said at least one first IC and said at least one of said first and second interconnect substrates.

2. The electronic device of claim 1 further comprising a third interconnect substrate over said first interconnect substrate and laterally adjacent said at least one first other IC.

3. The electronic device of claim 2 wherein said third interconnect substrate is aligned with said at least one first other IC.

4. The electronic device of claim 2 further comprising a plurality of solder bodies between said first and third interconnect substrates.

5. The electronic device of claim 2 wherein said third interconnect substrate comprises a dielectric layer, and electrically conductive traces extending therethrough and coupled to said first interconnect substrate and said at least one first IC.

6. The electronic device of claim 1 wherein said at least one first other IC comprises at least one first microelectromechanical systems (MEMS) IC; and further comprising at least one second MEMS IC over said at least one first MEMS IC.

7. The electronic device of claim 6 further comprising at least one second IC over said at least one first MEMS IC and electrically coupled to at least one of said first and second interconnect substrates.

8. The electronic device of claim 1 wherein said at least one first IC defines respective open spaces at opposing sides of the slotted opening; and wherein said encapsulation material fills the respective open spaces.

9. The electronic device of claim 1 wherein said at least one first other IC comprises at least one of a gyroscope and an accelerometer.

10. An electronic device comprising:

first and second laterally spaced apart interconnect substrates defining a slotted opening therebetween;

at least one first integrated circuit (IC) in the slotted opening defining respective open spaces at opposing sides of the slotted opening and electrically coupled to at least one of said first and second interconnect substrates;

at least one first microelectromechanical systems (MEMS) IC over said at least one first IC and electrically coupled to at least one of said first and second interconnect substrates;

said at least one first IC being offset with said at least one first MEMS IC;

an adhesive layer between said at least one first IC and said at least one first MEMS IC;

encapsulation material over said first and second interconnect substrates, said at least one first IC, and said at least one first MEMS IC and filling the respective open spaces; and

at least one bond wire directly coupled between said at least one first IC and said at least one of said first and second interconnect substrates.

11. The electronic device of claim 10 further comprising a third interconnect substrate over said first interconnect substrate and laterally adjacent said at least one first MEMS IC.

12. The electronic device of claim 11 wherein said third interconnect substrate is aligned with said at least one first MEMS IC.

13. The electronic device of claim 11 further comprising a plurality of solder bodies between said first and third interconnect substrates.

14. The electronic device of claim 11 wherein said third interconnect substrate comprises a dielectric layer, and electrically conductive traces extending therethrough and coupled to said first interconnect substrate and said at least one first IC.

15. A method for making an electronic device comprising:

positioning first and second interconnect substrates to be laterally spaced apart and defining a slotted opening therebetween;

positioning at least one first integrated circuit (IC) in the slotted opening and electrically coupled to at least one of the first and second interconnect substrates;

positioning at least one first other IC over the at least one first IC and electrically coupled to at least one of the first and second interconnect substrates, the at least one first IC being offset with the at least one first other IC;

forming an adhesive layer between the at least one first IC and the at least one first other IC;

forming encapsulation material over the first and second interconnect substrates, the at least one first IC, and the at least one first other IC; and

forming at least one bond wire directly coupled between the at least one first IC and the at least one of the first and second interconnect substrates.

16. The method of claim 15 further comprising positioning a third interconnect substrate over the first interconnect substrate and laterally adjacent the at least one first other IC.

17. The method of claim 16 further comprising aligning the third interconnect substrate with the at least one first other IC.

18. The method of claim 16 further comprising forming a plurality of solder bodies between the first and third interconnect substrates.

19. The method of claim 16 wherein the third interconnect substrate comprises a dielectric layer, and electrically conductive traces extending therethrough and coupled to the first interconnect substrate and the at least one first IC.

20. The method of claim 15 wherein the at least one other IC comprises at least one first microelectromechanical systems (MEMS) IC; and further comprising positioning at least one second MEMS IC over the at least one first MEMS IC.

21. The method of claim 20 further comprising positioning at least one second IC over the at least one first MEMS IC and electrically coupled to at least one of the first and second interconnect substrates.