IP Library Granted Patent US 10,089,429
Granted Patent B2
US 10,089,429 · App. 14/587,870 · Granted Oct 2, 2018

Method and system for verifying printed circuit board designs, and creating or verifying related electronic component placement data for printed circuit board fabrication and assembly

Inventors: Jonathan Hirschman (Brooklyn, NY); Petro Bakhirev (Brooklyn, NY); James Graham (Brooklyn, NY)
Assignee: ALTIUM LLC
G06F17/5072G06F3/0482G06F3/04842G06F3/04847G06F17/5081H05K3/0005
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Quick Facts
Patent No.
US 10,089,429
App. No.
14/587,870
Granted
Oct 2, 2018
Kind
B2
Abstract

A system for printed circuit board assembly includes a user interface provided on a display device for visual verification of printed circuit board design data, a user interface provided on the display device for inputting bill of material information, and a user interface provided on the display device for verification, alteration and creation of component placement data.

Claims (40)

1. A system for printed circuit board assembly comprising:

a user interface provided on a display device for visual verification of printed circuit board design data;

a user interface provided on the display device for inputting bill of material information that includes a list of components, wherein the user interface for inputting bill of material information comprises:

a display for inputting the bill of material information;

a display for searching for components to be added to the bill of material information; and

a display for showing a visual representation of each component; and

a user interface provided on the display device for verification, alteration and creation of component placement data, wherein the user interface for verification, alteration and creation of component placement data comprises a control for approving a footprint sprite overlaid on an image map of the printed circuit board design as being correctly positioned.

2. The system of claim 1 , wherein the user interface for visual verification of printed circuit board design data comprises:

an image map of a printed circuit board design; and

navigation controls for creating zoomed and panned views of the image map, for reviewing and approving the printed circuit board design.

3. The system of claim 2 , wherein the image map includes a visual representation of the printed circuit board design and each layer of the printed circuit board design as will be manufactured.

4. The system of claim 2 , wherein the image map is created from a transformation matrix determined from a coordinate system derived from the printed circuit board design data and characteristics of the user interface for visual verification of printed circuit board design data.

5. The system of claim 1 , wherein the user interface for verification, alteration and creation of component placement data comprises:

an image map of a printed circuit board design; and

a control for adding at least one footprint sprite overlay to at least a portion of the image map.

6. The system of claim 1 , wherein the user interface for verification, alteration and creation of component placement data comprises:

an image map of a printed circuit board design; and

controls for adjusting a rotation and coordinates of a footprint sprite overlay on the image map.

7. The system of claim 1 , wherein the user interface for verification, alteration and creation of component placement data comprises:

an image map of a printed circuit board design.

8. A method comprising:

providing a user interface on a display device for visual verification of printed circuit board design data;

providing a user interface on the display device for inputting bill of material information that includes a list of components and using the user interface for inputting bill of material information for:

inputting the bill of material information;

searching for components to be added to the bill of material information; and

showing a visual representation of each component; and

providing a user interface on the display device for verification, alteration and creation of component placement data and using the user interface for verification, alteration and creation of component placement data for approving a footprint sprite overlaid on an image map of a printed circuit board design as being correctly positioned.

9. The method of claim 8 , further comprising:

displaying an image map of a printed circuit board design in the user interface for visual verification of printed circuit board design data; and

creating zoomed and panned views of the image map, for reviewing and approving the printed circuit board design.

10. The method of claim 9 , further comprising including a visual representation of the printed circuit board design and each layer of the printed circuit board design as will be manufactured within the image map.

11. The method of claim 9 , further comprising creating the image map from a transformation matrix determined from a coordinate system derived from the printed circuit board design data and characteristics of the user interface for visual verification of printed circuit board design data.

12. The method of claim 8 , comprising using the user interface for verification, alteration and creation of component placement data for:

displaying an image map of a printed circuit board design; and

adding at least one footprint sprite overlay to at least a portion of the image map.

13. The method of claim 8 , comprising using the user interface for verification, alteration and creation of component placement data for:

displaying an image map of a printed circuit board design; and

adjusting a rotation and coordinates of a footprint sprite overlay on the image map.

14. The method of claim 8 , comprising using the user interface for verification, alteration and creation of component placement data for:

displaying an image map of a printed circuit board design.

Assignments (7)
SECURITY INTEREST Recorded Apr 9, 2024
From: MACROFAB, INC.
To: AVIDBANK
Reel/Frame 067049/0485 →
RELEASE OF SECURITY INTEREST Recorded Apr 4, 2024
From: BANC OF CALIFORNIA (FORMERLY KNOWN AS PACIFIC WESTERN BANK)
To: MACROFAB, INC.
Reel/Frame 067005/0944 →
SECURITY INTEREST Recorded Aug 2, 2023
From: MACROFAB, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 064468/0511 →
SECURITY INTEREST Recorded Jul 21, 2023
From: MACROFAB, INC.
To: TRINITY CAPITAL INC., AS COLLATERAL AGENT
Reel/Frame 064345/0642 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2023
From: ALTIUM LLC
To: MACROFAB, INC.
Reel/Frame 062925/0979 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2018
From: PCB:NG, INC.
To: ALTIUM LLC
Reel/Frame 046346/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2014
From: HIRSCHMAN, JONATHAN; BAKHIREV, PETRO; GRAHAM, JAMES
To: PCB:NG, INC
Reel/Frame 034608/0281 →
Continuity (2)
Provisional Application 61922106 · Dec 31, 2013
Related Publication 20150302130A1 · Oct 22, 2015
Cited By (5)
US 12,210,809 US 12,216,975 US 12,327,073 US 12,400,061 US 12,672,272