Bus microcontroller, bus node circuit and electronic control unit for a vehicle
A bus microcontroller includes a processor circuit having at least one unit designed for performing one or more functions due to a bus command via a communication bus, a power control circuit adapted to be coupled to a transmitter-receiver circuit for receiving bus messages via the communication bus, and a means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode. The power control circuit is designed to evaluate incoming bus messages with respect to an activation bus message containing information on activating at least part of the processor circuit, and to output a corresponding activation control signal. The bus microcontroller also includes means for activating at least a part of the processor circuit that is placed in a reduced-power operating mode, in response to output of an activation control signal of the power control circuit.
1. A bus microcontroller, comprising:
a processor circuit having at least one unit to perform one or more functions directed by a bus command received via a communication bus;
a power control circuit coupleable to a transmitter-receiver circuit, the transmitter-receiver circuit configured to receive bus messages via the communication bus;
means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode, said power control circuit configured to evaluate incoming bus messages, said power control circuit configured to determine if an activation bus message contains information to activate the at least part of the processor circuit, and said power control circuit configured to output an activation control signal corresponding to the information to activate the at least part of the processor circuit; and
means for activating the at least part of the processor circuit from the reduced-power operating mode in response to output of the activation control signal of the power control circuit, wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages.
2. The bus microcontroller according to claim 1 , wherein the bus microcontroller is a control area network (CAN) bus microcontroller.
3. The bus microcontroller according to claim 1 , wherein the means for placing at least part of the processor circuit into a reduced-power operating mode includes a means for determining which parts of the processor circuit are placed into the reduced-power operating mode.
4. The bus microcontroller according to claim 1 , wherein the means for placing at least part of the processor circuit into a reduced-power operating mode are configured to permit at least a second part of the processor circuit to perform a task while at least a first part of the processor circuit is placed into the reduced-power operating mode.
5. The bus microcontroller according to claim 4 , wherein the second part of the processor circuit is configured to cyclically monitor user-operated switch contacts of a circuit coupled to the bus microcontroller.
6. The bus microcontroller according to claim 4 , wherein the second part of the processor circuit is configured to perform a task while a processor core of the processor circuit is in the reduced-power operating mode and not participating in performing the task.
7. The bus microcontroller according to claim 4 , wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages.
8. The bus microcontroller according claim 1 , wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to be placed into a plurality of different activation modes triggered by different activation bus messages, wherein information to activate the at least part of the processor circuit corresponds to one of the plurality of different activation modes, and wherein the activation control signal output by the power control circuit is one of a plurality of activation control signals.
9. The bus microcontroller according to claim 1 , wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to operate with full functionality and an operating voltage applied thereto that is also applied in normal operation when the at least part of the processor circuit is not in the reduced-power operating mode.
10. The bus microcontroller according to claim 1 , wherein the at least part of the processor circuit placed into the reduced-power operating mode performs a task in normal operation of the bus microcontroller when the bus microcontroller identifies itself as an active bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages.
11. The bus microcontroller according to claim 1 , wherein the power control circuit is configured to analyze bus messages without participation of the processor circuit.
12. The bus microcontroller according to claim 1 , wherein the bus microcontroller is formed as part of a vehicle electronic control unit.
13. A bus node circuit for a communication bus, comprising:
a bus microcontroller having a processor circuit, the processor circuit having at least one unit adapted to perform one or more functions directed by a bus command passed over a communication bus;
a transmitter-receiver circuit to receive bus messages, the transmitter-receiver circuit coupleable to the communication bus;
a power control circuit coupled to the transmitter-receiver circuit;
means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode, the power control circuit configured to evaluate incoming bus messages, the power control circuit configured to determine if an activation bus message contains information to activate the at least part of the processor circuit, and the power control circuit configured to output an activation control signal corresponding to the information to activate the at least part of the processor circuit; and
means for activating the at least a part of the processor circuit from the reduced-power operating mode in response to output of the activation control signal of the power control circuit, wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages.
14. The bus node circuit according to claim 13 , wherein the transmitter-receiver circuit is coupleable to a communication bus of a vehicle.
15. The bus node circuit according to claim 13 , wherein the power control circuit is included in the transmitter-receiver circuit or the power control circuit is included in the bus microcontroller.
16. The bus node circuit according to claim 13 , wherein the bus node circuit is formed as part of a vehicle electronic control unit.
17. A method, comprising:
receiving a plurality of bus messages via a communication bus;
evaluating bus messages;
performing at least one function with a processor circuit, the performance of the at least one function directed by a bus command included in a first bus message of the plurality of bus messages;
placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode;
communicating an inactive-status bus message on the communication bus concurrent with the at least part of the processor circuit being in the reduced-power operating mode;
determining if an activation bus message contains information to activate the at least part of the processor circuit;
outputting an activation control signal corresponding to the information to activate the at least part of the processor circuit; and
activating the at least part of the processor circuit from the reduced-power operating mode in response to the activation control signal.
18. The method according to claim 17 , wherein placing the at least part of the processor circuit into the reduced-power operating mode is directed by information in a deactivation bus message.
19. The method according to claim 17 , wherein the communication bus is configured to pass bus messages that conform to a control area network (CAN) protocol.
20. The method according to claim 17 , comprising:
monitoring, with a second part of the processor circuit, at least one user-operated switch contact while the at least part of the processor circuit is in the reduced-power operating mode.
21. The method according to claim 17 , wherein determining if the activation bus message contains information to activate the at least part of the processor circuit includes applying a mask to at least a portion of the activation bus message.