IP Library Granted Patent US 10,068,523
Granted Patent B2
US 10,068,523 · App. 14/593,509 · Granted Sep 4, 2018

Display device

Inventor: Hajime Akimoto (Tokyo, JP)
Assignee: Japan Display Inc.
G09G3/3233G09G2300/0866
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Quick Facts
Patent No.
US 10,068,523
App. No.
14/593,509
Granted
Sep 4, 2018
Kind
B2
Abstract

The present invention provides a display device having a driving transistor for current-driving a light-emitting element provided in each pixel, wherein the drain of the driving transistor is connected to a first power source, the source of the driving transistor is connected to the light-emitting element and one end of a capacitor, and the gate of the driving transistor is connected to a voltage source via a first switch and simultaneously therewith is connected to the other end of the capacitor via a second switch; the other end of the capacitor is further connected to a signal line via a third switch; and the display device has a control circuit for selectively controlling the first power source to a plurality of voltages.

Claims (64)

1. A display device comprising:

power-source lines extending in a first direction and arranged in a second direction different from the first direction;

gate lines extending in the first direction and arranged in the second direction;

signal lines extending in the second direction and arranged in the first direction;

a cathode; and

pixels arranged in a matrix form in the first direction and the second direction, each of the pixels including:

an organic light-emitting element including an anode terminal and a cathode terminal;

a driving transistor including a first source/drain terminal, a second source/drain terminal, and a gate terminal;

a capacitor including a first capacitor electrode and a second capacitor electrode;

a first switch;

a second switch; and

a third switch,

wherein, in each of the pixels:

the cathode terminal is connected to the cathode;

the anode terminal is connected to the second source/drain terminal and the first capacitor electrode;

the first source/drain terminal is connected to the corresponding power-source line and the first switch;

the gate terminal is connected to the first switch and the second switch;

the first switch is connected to the second switch, the third switch, and the corresponding gate line;

the second switch is connected to the second capacitor electrode and the third switch; and

the third switch is connected to the corresponding signal line, and

wherein at least one of the pixels is configured so that:

in a first timing, a reset voltage is applied to the corresponding power-source line, the first switch and the third switch are turned off, and the second switch is turned on;

in a second timing after the first timing, a writing voltage is applied to the corresponding power-source line, the first switch and the third switch are turned on, the second switch is turned off, the writing voltage is applied to the first source/drain terminal and the gate terminal, and a gray-scale voltage is applied to the corresponding signal line and the second capacitor terminal; and

in a third timing after the second timing, a power-supply voltage is applied to the corresponding power-source line and the first source/drain terminal, the first switch and the third switch are turned off, the second switch is turned on, and the organic light-emitting element emits light based on a stored voltage of the capacitor.

2. The display device according to claim 1 , wherein the at least one of the pixels is further configured so that:

a first voltage based on the reset voltage is applied to the anode terminal in the first timing;

a second voltage obtained by subtracting a threshold voltage of the driving transistor from the writing voltage is applied to the anode terminal and the first capacitor electrode in the second timing; and

the stored voltage obtained by subtracting the second voltage from the gray-scale voltage is applied to the driving transistor in the third timing.

3. The display device according to claim 1 , wherein the pixel adjacent to the at least one of the pixels in the second direction is configured so that:

in the second timing, the reset voltage is applied to the power-source line corresponding to the pixel adjacent to the at least one of the pixels, the first switch and the third switch are turned off, and the second switch is turned on;

in the third timing, the writing voltage is applied to the power-source line corresponding to the pixel adjacent to the at least one of the pixels, the first switch and the third switch are turned on, the second switch is turned off, the writing voltage is applied to the first source/drain terminal and the gate terminal, the gray-scale voltage is applied to the corresponding signal line and the second capacitor terminal; and

in a fourth timing after the third timing, the power-supply voltage is applied to the power-source line corresponding to the pixel adjacent to the at least one of the pixels and the first source/drain terminal, the first switch and the third switch are turned off, the second switch is turned on, and the organic light-emitting element emits light based on the stored voltage of the capacitor.

4. A display device comprising:

a cathode; and

pixels arranged in a matrix form in a first direction and a second direction different from the first direction, each of the pixels including:

an organic light-emitting element including an anode terminal and a cathode terminal;

a driving transistor including a first source/drain terminal, a second source/drain terminal, and a gate terminal;

a capacitor including a first capacitor electrode and a second capacitor electrode;

a first switch;

a second switch; and

a third switch,

wherein, in each of the pixels:

the cathode terminal is connected to the cathode electrode;

the second source/drain terminal is connected to the first capacitor electrode;

the first source/drain terminal is connected to the first switch;

the gate terminal is connected to the first switch and the second switch;

the first switch is connected to the second switch and the third switch; and

the second switch is connected to the second capacitor electrode and the third switch, and

wherein at least one of the pixels is configured so that:

in a first timing, a reset voltage is applied to the first source/drain terminal, the first switch and the third switch are turned off, and the second switch is turned on;

in a second timing after the first timing, the first switch and the third switch are turned on, the second switch is turned off, a writing voltage is applied to the first source/drain terminal and the gate terminal, and a gray-scale voltage is applied to the second capacitor terminal; and

in a third timing after the second timing, a power-supply voltage is applied to the first source/drain terminal, the first switch and the third switch are turned off, the second switch is turned on, and the organic light-emitting element emits light based on a stored voltage of the capacitor.

5. The display device according to claim 4 ,

wherein each of the driving transistors, the first switches, and the third switches is a N-channel transistor, and each of the second switches is a P-channel transistor.

6. The display device according to claim 4 ,

wherein each of the driving transistors, the first switches, the second switches, and the third switches is a N-channel transistor.

7. The display device according to claim 4 ,

wherein the second source/drain terminal is connected to the anode terminal in the at least one of the pixels.

8. The display device according to claim 4 ,

wherein each of the pixels further comprises a fourth switch arranged between the second source/drain electrode and the anode terminal and between the first capacitor electrode and the anode terminal, and

the at least one of the pixels is further configured so that:

the fourth switch is turned on in the first timing;

the fourth switch is turned off in the second timing; and

the fourth switch is turned on in the third timing.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2015
From: AKIMOTO, HAJIME
To: JAPAN DISPLAY INC.
Reel/Frame 035129/0044 →
Priority Claims (1)
JP 2014-006987 · Jan 17, 2014 · national
Continuity (1)
Related Publication 20150206474A1 · Jul 23, 2015