Voltage regulator with overshoot suppression circuit and capability to stop overshoot suppression

1. A voltage regulator comprising:

a reference voltage circuit which generates a reference voltage;

an output transistor which outputs an output voltage;

an error amplifier circuit which amplifies and outputs a difference between a divided voltage obtained by dividing the output voltage and the reference voltage and controls a gate of the output transistor;

an overshoot detection circuit having an input terminal to which a voltage based on the output voltage is inputted; and

an overshoot suppression circuit having an input terminal to which an output of the overshoot detection circuit is inputted, and an output terminal connected to an output terminal of the error amplifier circuit, said voltage regulator comprising:

a driver state discrimination circuit which has an input terminal connected to the output terminal of the error amplifier circuit and discriminates a state of the output transistor; and

a first transistor having a gate connected to an output terminal of the driver state discrimination circuit, and a drain connected to the input terminal of the overshoot suppression circuit, said first transistor stopping the operation of the overshoot suppression circuit in response to the output of the driver state discrimination circuit.

2. The voltage regulator according to claim 1 , wherein the first transistor has a source to which a first constant current circuit is connected.

3. The voltage regulator according to claim 1 , wherein the driver state discrimination circuit comprises:

a second transistor having a gate connected to the output terminal of the error amplifier circuit,

a second constant current circuit connected to a drain of the second transistor, and

an inverter having an input connected to the drain of the second transistor and an output connected to the gate of the first transistor.

4. The voltage regulator according to claim 3 , wherein the driver state discrimination circuit includes a level shift circuit provided between the output terminal of the error amplifier circuit and the gate of the second transistor.

5. The voltage regulator according to claim 4 , wherein the level shift circuit comprises:

a third transistor having a gate connected to an input terminal of the level shift circuit and a drain connected to a ground terminal,

a third constant current circuit having one terminal connected to a power supply terminal and the other terminal connected to an output terminal of the level shift circuit, and

an impedance element provided between a source of the third transistor and the other terminal of the third constant current circuit.

6. The voltage regulator according to claim 5 , wherein the impedance element is comprised of a resistor or a diode-connected transistor.

7. The voltage regulator according to claim 4 , wherein the level shift circuit comprises:

a third constant current circuit having one terminal connected to the power supply terminal,

a third transistor having a gate connected to the input terminal of the level shift circuit, a source connected to the other terminal of the third constant current circuit, and a drain connected to the ground terminal,

a fourth constant current circuit having one terminal connected to the power supply terminal,

a fourth transistor having a gate connected to the source of the third transistor and a source connected to the other terminal of the fourth constant current circuit,

an mth (where m is an integer greater than or equal to 5) constant current circuit having one terminal connected to the power supply terminal, and

an mth transistor having a gate connected to a source of an m−1th transistor and a source connected to the other terminal of the mth constant current circuit and the output terminal of the level shift circuit.