IP Library Granted Patent US 9,502,979
Granted Patent B2
US 9,502,979 · App. 14/598,647 · Granted Nov 22, 2016

Output switching circuit

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Quick Facts
Patent No.
US 9,502,979
App. No.
14/598,647
Granted
Nov 22, 2016
Kind
B2
Abstract

An output switching circuit includes a switching circuit having a first transistor connected to a high-voltage power supply, a second transistor connected to a low-voltage power supply, and an output s terminal at a connection node between the first and second transistors; a comparison unit that compares an input signal with a feedback signal obtained by feedback of an output signal of the output terminal via a low-pass filter to generate a comparison signal; and a drive pulse generating unit that generates first drive pulses for driving the first transistor and second drive pulses for driving the second transistor in accordance with the comparison signal.

Claims (40)

1. A comparison unit for a switching circuit, comprising:

a comparator configured to compare an input signal with a feedback signal to provide a first signal;

a sampling circuit configured to sample the first signal according to a reference clock to provide a sampling signal, the sampling signal having a first level or a second level; and

a comparison signal generating circuit configured to provide a comparison signal having the first level when the sampling signal is at the first level for a longer time duration than the second level or having the second level when the sampling signal is at the first level for a shorter time duration than the second level.

2. The comparison unit of claim 1 , wherein the switching circuit is configured to switch an output signal between the first level and the second level when the comparison signal transitions between the first level and the second level.

3. The comparison unit of claim 2 , wherein the switching circuit is configured to switch the output signal synchronously with the reference clock.

4. The comparison unit of claim 1 , wherein the switching circuit comprises:

a first transistor configured to provide the output signal at the first level when the comparison signal is at the first level; and

a second transistor, coupled to the first transistor, configured to provide the output signal at the second level when the comparison signal is at the second level.

5. The comparison unit of claim 2 , wherein the feedback signal is based upon the output signal.

6. The comparison unit of claim 5 , wherein the feedback signal is a representation of the output signal that has been low pass filtered.

7. The comparison unit of claim 1 , wherein the first level of the comparison signal indicates that a voltage of the input signal is higher than a voltage of the feedback signal, and

wherein the second level of the comparison signal indicates that the voltage of the input signal is lower than the voltage of the feedback signal.

8. A method for switching a switching circuit, comprising:

comparing an input signal with a feedback signal to provide a first signal;

sampling the first signal according to a reference clock to provide a sampling signal, the sampling signal having a first level or a second level;

providing a comparison signal having the first level when the sampling signal is at the first level for a longer time duration than the second level or having the second level when the sampling signal is at the first level for a shorter time duration than the second level; and

switching an output signal of the switching circuit between the first level and the second level when the comparison signal transitions between the first level and the second level.

9. The method of claim 8 , wherein the switching comprises:

switching the output signal synchronously with the reference clock.

10. The method of claim 8 , wherein the switching comprises:

activating a first transistor to provide the output signal at the first level when the comparison signal is at the first level; and

activating a second transistor, coupled to the first transistor, to provide the output signal at the second level when the comparison signal is at the second level.

11. The method of claim 8 , wherein the feedback signal is based upon the output signal.

12. The method of claim 8 , wherein the feedback signal is a representation of the output signal that has been low pass filtered.

13. The method of claim 8 , wherein the first level of the comparison signal indicates that a voltage of the input signal is higher than a voltage of the feedback signal, and

wherein the second level of the comparison signal indicates that the voltage of the input signal is lower than the voltage of the feedback signal.

14. A comparison unit for a switching circuit, comprising:

means for comparing an input signal with a feedback signal to provide a first signal;

means for sampling the first signal according to a reference clock to provide a sampling signal, the sampling signal having a first level or a second level; and

means for providing a comparison signal having the first level when the sampling signal is at the first level for a longer time duration than the second level or having the second level when the sampling signal is at the first level for a shorter time duration than the second level.

15. The comparison unit of claim 14 , wherein the switching circuit is configured to switch an output signal between the first level and the second level when the comparison signal transitions between the first level and the second level.

16. The comparison unit of claim 15 , wherein the switching circuit is configured to switch the output signal synchronously with the reference clock.

17. The comparison unit of claim 14 , wherein the switching circuit comprises:

a first transistor configured to provide the output signal at the first level when the comparison signal is at the first level; and

a second transistor, coupled to the first transistor, configured to provide the output signal at the second level when the comparison signal is at the second level.

18. The comparison unit of claim 15 , wherein the feedback signal is based upon the output signal.

19. The comparison unit of claim 18 , wherein the feedback signal is a representation of the output signal that has been low pass filtered.

20. The comparison unit of claim 14 , wherein the first level of the comparison signal indicates that a voltage of the input signal is higher than a voltage of the feedback signal, and

wherein the second level of the comparison signal indicates that the voltage of the input signal is lower than the voltage of the feedback signal.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 050829/0230 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Sep 26, 2019
From: MUFG UNION BANK, N.A., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 050500/0112 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035902/0821 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 034773/0011 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: WAKII, TAKESHI; YOSHIOKA, AKIHITO
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 034783/0793 →