Integrated circuit comprising a frequency dependent circuit, wireless device and method of adjusting a frequency
View Patent ↗An integrated circuit comprises a frequency dependent circuit comprising an input node, an output node and a main bank of selectable first capacitive elements that affect a frequency characteristic of the frequency dependent circuit. The frequency dependent circuit further comprises at least one shunt bank of selectable second capacitive elements located between ground and one of the input node or the output node, wherein at least one selectable second capacitive element switched out of the frequency dependent circuit is based on a number of the selectable first capacitive elements that are switched into the frequency dependent circuit.
1. An integrated circuit for a wireless device, the integrated circuit comprising a frequency dependent circuit comprising:
an input node;
an output node;
a main bank of selectable first capacitive elements that affect a frequency characteristic of the frequency dependent circuit;
a first shunt bank of selectable second capacitive elements located between ground and the input node;
a second shunt bank of selectable second capacitive elements located between ground and the output node;
a phase locked loop comprising a phase frequency detector and a voltage controlled oscillator, an output of phase frequency detector coupled to an input of the voltage controlled oscillator, wherein the input node defines an input of the voltage controlled oscillator and the output node defines an output of the voltage controlled oscillator, and wherein the phase frequency detector is coupled to receive a reference frequency and is coupled to a divided frequency output of the voltage controlled oscillator with a switch; and
a controller configured to:
apply a tuning voltage to the phase frequency detector;
control the switch to open a loop of the phase locked loop; and
subsequent to opening the loop of the phase locked loop, selectively enable or disable at least one selectable second capacitive element as a function of a number of the selectable first capacitive elements that are switched into the frequency dependent circuit.
2. The integrated circuit of claim 1 , wherein the selectable second capacitive element(s) enabled or disabled are a function of a parasitic capacitance effect due to the number of the selectable first capacitive elements that are switched into the frequency dependent circuit.
3. The integrated circuit of claim 1 , wherein the controller is arranged to switch out corresponding selectable second capacitive elements of the first shunt bank and second shunt bank of the frequency dependent circuit.
4. The integrated circuit of claim 3 , wherein a capacitance value of a selected capacitive element from the first shunt bank of selectable second capacitive elements corresponds to a capacitance value of a selected second capacitive element from the second shunt bank of selectable second capacitive elements such that a combination of a total shunt capacitance of the first shunt bank of selectable second capacitive elements and second shunt bank of selectable second capacitive elements is substantially constant.
5. The integrated circuit of claim 1 , wherein the controller is arranged to switch out at least one selectable second capacitive element to maintain a constant capacitance adjustment step independent of the number of the selectable first capacitive elements that are switched into the frequency dependent circuit.
6. The integrated circuit of claim 1 , wherein the controller is operably coupled to the main bank of selectable first capacitive elements and configured to apply a first control signal to switch a number of the selectable first capacitive elements in or out of the frequency dependent circuit to affect the frequency characteristic of the frequency dependent circuit.
7. The integrated circuit of claim 1 , wherein the controller is operably coupled to the first shunt bank and configured to apply a control signal to switch the selectable second capacitive elements in or out of the frequency dependent circuit.
8. The integrated circuit of claim 7 , wherein the control signal comprises a control word and the controller is operably coupled to both the main bank of selectable first capacitive elements and the first shunt bank.
9. The integrated circuit of claim 1 , wherein at least one from a group of: the main bank of selectable first capacitive elements, the first shunt bank, and the second shunt bank, comprises binary weighted capacitive banks or thermometric controlled capacitive banks.
10. The integrated circuit of claim 1 , wherein the main bank of selectable first capacitive elements comprises a bank of coarse-tuning capacitor elements in parallel with a bank of fine-tuning capacitor elements.
11. The integrated circuit of claim 10 , wherein a shunt bank switched into or out of the frequency dependent circuit corresponds to at least one capacitive element of the bank of fine-tuning capacitor elements being switched out of or into the frequency dependent circuit.
12. The integrated circuit of claim 1 , wherein at least one from a group of: the main bank of selectable first capacitive elements, the first shunt bank, and the second shunt bank, comprises a plurality of varactors.
13. The integrated circuit of claim 12 , wherein the plurality of varactors are formed from at least one of: bipolar junction transistor switched capacitances, metal oxide semiconductor based switched capacitances.
14. The integrated circuit of claim 1 , wherein the frequency characteristic is a resonant frequency of the frequency dependent circuit.
15. The integrated circuit of claim 1 , wherein the device is from a group of: a long range radar device, short range radar device, operating at millimeter waveform frequencies.
16. A wireless device, comprising a frequency dependent circuit comprising:
an input node;
an output node;
a main bank of selectable first capacitive elements that affect a frequency characteristic of the frequency dependent circuit;
a first shunt bank of selectable second capacitive elements located between ground and the input node;
a second shunt bank of selectable second capacitive elements located between ground and the output node;
a phase locked loop comprising a phase frequency detector and a voltage controlled oscillator, an output of phase frequency detector coupled to an input of the voltage controlled oscillator, wherein the input node defines an input of the voltage controlled oscillator and the output node defines an output of the voltage controlled oscillator, and wherein the phase frequency detector is coupled to receive a reference frequency and is coupled to a divided frequency output of the voltage controlled oscillator with a switch; and
a controller configured to:
apply a tuning voltage to the phase frequency detector;
control the switch to open a loop of the phase locked loop; and
subsequent to opening the loop of the phase locked loop, selectively enable or disable at least one selectable second capacitive element as a function of a number of the selectable first capacitive elements that are switched into the frequency dependent circuit.