IP Library Patent Application 14606981
Patent Application
App. No. 14/606,981

LOW JITTER DEVICE AND SYSTEM

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Quick Facts
Patent No.
US None
App. No.
14/606,981
Abstract

A communication apparatus includes a serializer transmission circuit (TX) configured to receive a plurality of data channels in parallel, and the serializer transmission circuit (TX) transmits data serially as a data stream signal. A film bulk acoustic resonator (FBAR) is coupled with the serializer transmission circuit (TX). The film bulk acoustic resonator is part of an ultra-low phase noise reference oscillator configured to generate an ultra-high frequency reference clock signal.

Claims (36)

1 . A communication apparatus comprising:

an ultra-low phase noise reference oscillator configured to generate an ultra-high frequency reference clock signal;

a phase locked loop circuit (PLL) coupled with the ultra-low phase noise reference oscillator and configured to generate a transmission clock signal based on the ultra-high frequency reference clock signal; and

a serializer transmission circuit (TX) coupled with the ultra-low phase noise reference oscillator through the phase locked loop circuit (PLL), the serializer transmission circuit (TX) configured to receive the transmission clock signal and a plurality of data channels in parallel and wherein the serializer transmission circuit (TX) transmits data serially as a data stream signal.

2 . A communication apparatus as recited in claim 1 , wherein the ultra-low phase noise reference oscillator has ultra-low phase noise characteristics comprising at least one of: between approximately −120 dBC/Hz and approximately −110 dBC/Hz at 10 kHz offset from carrier of the ultra-high frequency reference clock signal, between approximately −140 dBC/Hz and approximately −130 dBC/Hz at 100 kHz offset from earner of the ultra-high frequency reference clock signal, and between approximately −160 dBC/Hz and approximately −150 dBC/Hz at 1 MHz offset from carrier of the ultra-high frequency reference clock signal.

3 . A communication apparatus as recited in claim 1 , wherein the ultra-low phase noise reference oscillator has ultra-low phase noise characteristics comprising integrated jitter of approximately twenty femtoseconds or less.

4 . A communication apparatus as recited in claim 1 wherein the ultra-high frequency reference clock signal comprises approximately an S band signal.

5 . A communication apparatus as recited in claim 1 , wherein the phase locked loop circuit (PLL) coupled with the ultra-low phase noise reference oscillator is configured so that the transmission clock signal has ultra-low phase noise characteristics.

6 . A communication apparatus as recited in claim 5 , wherein the ultra-low phase noise characteristics of the transmission clock signal comprise at least one of: between approximately −90 dBC/Hz and approximately −100 dBC/Hz at 10 kHz offset from carrier of the ultra-high frequency reference clock signal between approximately −110 dBC/Hz and approximately −100 dBC/Hz at 100 kHz offset from carrier of the ultra-high frequency reference clock signal, and between approximately −110 dBC/Hz and approximately −100 dBC/Hz at 1 MHz offset from carrier of the ultra-high frequency reference clock signal.

7 . A communication apparatus as recited in claim 5 , wherein the ultra-low phase noise characteristics of the transmission clock signal have integrated jitter of approximately two-hundred femtoseconds or less.

8 . A communication apparatus as recited in claim 1 , wherein the transmission clock signal comprises approximately a Ku band signal.

9 . A communication apparatus as recited in claim 1 , wherein the phase locked loop circuit (PLL) coupled with the ultra-low phase noise reference oscillator is configured to substantially reduce close-in phase noise for the transmission clock signal by substantially tracking-out close-in phase noise of the ultra-low phase noise reference oscillator.

10 . A communication apparatus as recited in claim 1 , wherein the serializer transmission circuit (TX) coupled with the ultra-low phase noise reference oscillator through the phase locked loop circuit (PLL) is configured to transmit data serially as part of a 100 gigabit ethernet system.

11 . A communication apparatus as recited in claim 1 , wherein the serializer transmission circuit (TX) coupled with the ultra-low phase noise reference oscillator through the phase locked loop circuit (PLL) is configured to transmit data serially as part of a 300 gigabit per second optical data link.

12 . A communication apparatus as recited in claim 1 , further comprising a deserializer receiver circuit (RX) having a clock and data recovery circuit (CDR) coupled with the serializer transmission circuit (TX) and configured to substantially recover the transmission clock signal from the data stream signal as a recovered clock signal.

13 . A communication apparatus as recited in claim 12 , wherein the recovered clock signal has ultra-low phase noise characteristics.

14 . A communication apparatus as recited in claim 12 , wherein the recovered clock signal comprises approximately a Ku band signal.

15 . A communication apparatus as recited in claim 1 , wherein the ultra-low phase noise reference oscillator comprises:

a base substrate comprising a bonding pad provided thereover;

a bulk acoustic wave (BAW) resonator disposed on the base substrate;

a lid substrate comprising a bonding pad seal provided thereover, the bonding pad seal bonding with the bonding pad to define a hermetically sealed volume between the lid substrate and the base substrate;

a material layer region provided over a portion of a first surface of the lid substrate within the hermetically sealed volume; and

electronic circuitry provided over or in the material layer region.

16 . A communication apparatus as recited in claim 1 , wherein the ultra-low phase noise reference oscillator comprises a temperature compensated BAW resonator.

17 . A communication apparatus as recited in claim 1 wherein the BAW resonator comprises a film bulk acoustic resonator (FBAR) or a solidly mounted resonator (SMR).

18 . A communication apparatus as recited in claim 1 wherein the ultra-low phase noise reference oscillator comprises a zero drift resonator.

19 . A communication apparatus comprising:

a serializes transmission circuit (TX) configured to receive a plurality of data channels in parallel and wherein the serializer transmission circuit (TX) transmits data serially as a data stream signal; and

a film bulk acoustic resonator (FBAR) or a solidly mounted resonator (SMR) coupled with the serializer transmission circuit (TX).

20 . A communication apparatus as recited in in claim 19 wherein the film bulk acoustic resonator or solidly mounted resonator is part of an ultra-low phase noise reference oscillator configured to generate an ultra-high frequency reference clock signal.

21 . A communication apparatus comprising:

a base substrate having a bonding pad provided thereon;

an bulk acoustic wave (BAW) resonator disposed on the base substrate;

a lid substrate having a bonding pad seal provided thereon, the bonding pad seal bonding with the bonding pad to define a hermetically sealed volume between the lid substrate and the base substrate;

a serializer transmission circuit (TX) coupled with the acoustic resonator and configured to receive a plurality of data channels in parallel and wherein the serializer transmission circuit (TX) transmits data serially as a data stream signal.

22 . A communication apparatus as recited in in claim 21 wherein the BAW resonator is part of an ultra-low phase noise reference oscillator configured to generate an ultra-high frequency reference clock signal.

Assignments (3)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2015
From: RUBY, RICHARD; SEIDEL, ANDREW; GUPTA, SANJEEV
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035397/0814 →