IP Library Granted Patent US 9,678,588
Granted Patent B2
US 9,678,588 · App. 14/607,212 · Granted Jun 13, 2017

Wire-bonded borderless display

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Quick Facts
Patent No.
US 9,678,588
App. No.
14/607,212
Granted
Jun 13, 2017
Kind
B2
Abstract

An LCD module may include a color filter (CF) layer with pixels for modifying light energy to form a display image. A transistor layer below the CF layer may include a glass panel, conductive pathways, and transistors coupled to the conductive pathways and for controlling the pixels. A control layer is located below the transistor layer and may include a display controller for generating signals to control the transistor. First wire bondings carry the signals between the display controller and the conductive pathways included in the transistor layer. The LCD module may be used in a substantially round device, such as a watch, to provide a substantially borderless display.

Claims (46)

1. A device comprising:

a color filter (CF) layer that includes a plurality of pixels, wherein the plurality of pixels are configured to modify light energy to form a display image;

a transistor layer that includes a first glass panel, conductive pathways, and a plurality of transistors coupled to the conductive pathways, wherein the plurality of transistors are configured to control the plurality of pixels;

a control layer located below the transistor layer, wherein the control layer includes a display controller configured to generate signals to control the plurality of transistors; and

first wire bondings configured to carry the signals between the display controller and the conductive pathways included in the transistor layer; and

wherein the CF layer, the transistor layer and the control layer are in stacked relationship and a longitudinal axis of the device traverses at least the CF layer and the transistor layer, a radial sidewall of the transistor layer is generally parallel to the longitudinal axis; and

wherein the first wire bondings couple to the conductive pathways by connection to conductive material of the transistor layer that is exposed on the radial sidewall of the transistor layer.

2. The device of claim 1 , wherein the transistors are thin film transistors (TFTs).

3. The device of claim 1 , wherein the conductive pathways include rows and columns, the transistors are positioned at intersections of the rows and the columns, and each of the rows and the columns are coupled to a corresponding one of the first wire bondings.

4. The device of claim 1 , wherein the device further includes a border around the transistor layer and the control layer, and wherein the first wire bondings pass through the border.

5. The device of claim 4 , wherein the border includes an epoxy.

6. The device of claim 1 , wherein the transistor layer has a round or oval shape, and wherein the first wire bondings are disposed at a plurality of locations around the perimeter of the transistor layer.

7. The device of claim 1 , further comprising:

an input layer configured to generate signals associated with a user input, wherein the input layer is located above the CF layer;

an input driver included in the control layer, wherein the input driver is configured to process the signals associated with the user input; and

second wire bondings configured to carry the signals between the input layer and the control layer.

8. The device of claim 7 , wherein the input layer is associated with a capacitive touch screen, wherein the signals relate to changes in capacitances of the touch screen at different location based on the user input, and wherein the input driver analyzes the changes in capacitances to determine a location of the user input on the touch screen.

9. The device of claim 7 , wherein the input layer includes rows and columns of conductive materials, and each of the rows and the columns are coupled to a corresponding one of the second wire bondings.

10. The device of claim 7 , wherein the input layer has a round or oval shape, and wherein the second wire bondings are disposed at one portion of a perimeter of the input layer.

11. The device of claim 1 , wherein the control layer further includes a second glass panel, and wherein the display controller is mounted to the second glass panel.

12. The device of claim 1 , wherein control layer further includes a flexible printed circuit (FPC) configured to generate drive signals, and wherein the display controller is further configured to selectively forward the drive signals to the transistors.

13. A user device comprising:

a display module, wherein the display module includes:

a color filter (CF) layer that includes a first glass panel and a plurality of pixels coupled to the first glass panel, wherein the plurality of pixels form a display,

a transistor layer that includes a second glass panel, conductive pathways, and a plurality of transistors coupled to the conductive pathways, wherein the plurality of transistors are configured to control the plurality of pixels,

a control layer located below the transistor layer, wherein the control layer includes a display controller configured to generate signals to selectively activate the plurality of transistors, and

first wire bondings configured to carry the signals between the display controller and the conductive pathways included in the transistor layer; and

wherein the CF layer, the transistor layer and the control layer are in stacked relationship and a longitudinal axis of the user device traverses at least the CF layer and the transistor layer, a radial sidewall of the transistor layer is generally parallel to the longitudinal axis; and

wherein the first wire bondings couple to the conductive pathways by connection to conductive material of the transistor layer that is exposed on the radial sidewall of the transistor layer; and

an enclosure to house the display module.

14. The user device of claim 13 , wherein the conductive pathways include rows and columns, the transistors are positioned at intersections of the rows and the columns, and each of the rows and the columns are coupled to a corresponding one of the first wire bondings.

15. The user device of claim 13 , wherein the display module further comprises:

an input layer configured to generate signals associated with a user input and provide touch screen functionality;

an input driver included in the control layer, wherein the input driver is configured to process the signals associated with the user input to determine a location of the user input on the display module; and

second wire bondings configured to carry the signals between the input layer and the control layer.

16. The user device of claim 13 , wherein the display is borderless within the enclosure.

17. A device comprising:

an input layer configured to generate signals associated with a user input;

a color filter (CF) layer that includes a plurality of pixels, wherein the plurality of pixels are configured to modify light energy to form a display image, and wherein the CF layer is located below the input layer;

a transistor layer that includes a substrate, conductive pathways, and a plurality of transistors coupled to the conductive pathways, wherein the plurality of transistors are configured to control the plurality of pixels;

a control layer located below the transistor layer, wherein the control layer includes a display controller configured to generate signals to control the plurality of transistors;

first wire bondings configured to carry the signals between the display controller and the conductive pathways included in the transistor layer; and

second wire bondings configured to carry the signals between the input layer and the control layer; and

wherein the input layer, the CF layer, the transistor layer and the control layer are in stacked relationship and a longitudinal axis of the device traverses at least the input layer, the CF layer and the transistor layer, a radial sidewall of the input layer is generally parallel to the longitudinal axis and a radial sidewall of the transistor layer is generally parallel to the longitudinal axis;

wherein the first wire bondings couple to the conductive pathways by connection to conductive material of the transistor layer that is exposed on the radial sidewall of the transistor layer; and

wherein the second wire bondings connect to the input layer on the radial sidewall of the input layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2019
From: SONY MOBILE COMMUNICATIONS, INC.
To: SONY CORPORATION
Reel/Frame 048691/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2016
From: SONY CORPORATION
To: SONY MOBILE COMMUNICATIONS INC.
Reel/Frame 038542/0224 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: BEGIC, STJEPAN; SIMONSSON, OLOF; STEIJNER, MAGNUS
To: SONY CORPORATION
Reel/Frame 034828/0716 →