IP Library Granted Patent US 9,204,076
Granted Patent B2
US 9,204,076 · App. 14/607,786 · Granted Dec 1, 2015

Imaging apparatus

Inventor: Yoshio Hagihara (Tokyo, JP)
Assignee: OLYMPUS CORPORATION
H04N5/378H03M1/56
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,204,076
App. No.
14/607,786
Granted
Dec 1, 2015
Kind
B2
Abstract

An imaging apparatus includes a clock generation unit that generates a plurality of phase signals having phases different from one another, a signal transmission unit provided to correspond to the plurality of phase signals and having a plurality of signal transmission circuits, and a latch unit having a plurality of latch circuits that latches the phase signals transmitted by the signal transmission unit at a timing of an end of a comparison process performed by a comparison unit. A configuration of the signal transmission circuit that transmits a first phase signal is substantially the same as a configuration of the signal transmission circuit that transmits a second phase signal different from the first phase signal. A configuration of the latch circuit that latches the first phase signal is substantially the same as a configuration of the latch circuit that latches the second phase signal.

Claims (18)

1. An imaging apparatus comprising:

an imaging unit in which a plurality of pixels, each of which has a photoelectric conversion element and is configured to output a pixel signal, are disposed in a matrix of M (M is a natural number greater than or equal to 2) rows by N (N is a natural number greater than or equal to 2) columns;

a reference signal generation unit configured to generate a reference signal which increases or decreases over time;

a comparison unit configured to compare the pixel signal to the reference signal and end a comparison process at a timing at which the reference signal satisfies a predetermined condition with respect to the pixel signal;

a clock generation unit having a plurality of delay units and configured to generate a plurality of phase signals having phases different from each other based on signals output from the plurality of delay units;

a signal transmission unit provided to correspond to the plurality of phase signals and having a plurality of signal transmission circuits configured to transmit the plurality of phase signals; and

a latch unit having a plurality of latch circuits configured to latch the plurality of phase signals transmitted by the signal transmission unit at the timing of an end of the comparison process,

wherein the plurality of signal transmission circuits have main buffer circuits,

wherein a configuration of the signal transmission circuit that transmits a first phase signal which is any one of the plurality of phase signals is substantially the same as a configuration of the signal transmission circuit that transmits a second phase signal which is any one of the plurality of phase signals and is different from the first phase signal, and

wherein a configuration of the latch circuit that latches the first phase signal is substantially the same as a configuration of the latch circuit that latches the second phase signal.

2. The imaging apparatus according to claim 1 , wherein the plurality of signal transmission circuits include:

a first circuit configured to transmit a third phase signal which is any one of the plurality of phase signals;

a second circuit configured to be substantially the same as the first circuit and configured to transmit the third phase signal; and

a phase blend circuit configured to blend the third phase signal transmitted by the first circuit and the third phase signal transmitted by the second circuit.

3. The imaging apparatus according to claim 1 , wherein the plurality of latch circuits include:

a logic circuit to which the plurality of phase signals transmitted by the signal transmission unit are input; and

a main body circuit configured to latch a signal output from the logic circuit.

4. The imaging apparatus according to claim 1 , wherein the plurality of signal transmission circuits have sub-buffer circuits disposed at a subsequent stage side of the main buffer circuits and a previous stage side of the plurality of latch circuits on a path through which the plurality of phase signals are transmitted.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 27, 2016
From: OLYMPUS CORPORATION
To: OLYMPUS CORPORATION
Reel/Frame 039344/0502 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: HAGIHARA, YOSHIO
To: OLYMPUS CORPORATION
Reel/Frame 034834/0361 →
Priority Claims (1)
JP 2013-190714 · Sep 13, 2013 · national
Continuity (2)
Continuation PCTJP2014071312 · Aug 12, 2014
Related Publication 20150144771A1 · May 28, 2015