IP Library Granted Patent US 9,484,932
Granted Patent B2
US 9,484,932 · App. 14/611,820 · Granted Nov 1, 2016

Signal generation circuit and electronic apparatus

Inventors: Kazuki Akutagawa (Kanagawa, JP); Yasunori Tsukuda (Kanagawa, JP); Eiichi Nakamoto (Kanagawa, JP); Akito Sekiya (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H03L7/081H03L7/22H03L2207/50
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Quick Facts
Patent No.
US 9,484,932
App. No.
14/611,820
Granted
Nov 1, 2016
Kind
B2
Abstract

A signal generation circuit includes a phase difference detector configured to detect a phase difference between a certain oscillation signal of a plurality of oscillation signals and a predetermined reference signal; an oscillator to which a plurality of delay elements are connected annularly, the oscillator being configured to generate the plurality of oscillation signals depending on the detected phase difference; a low-speed signal generation circuit configured to generate a low-speed signal having a lower frequency than the oscillation signal; a detection circuit configured to detect a difference between a predetermined reference timing and a timing at which the low-speed signal has changed; a selection unit configured to select the oscillation signal so that the phase difference with respect to the reference signal is close to the detected difference; and an output unit configured to output the generated low-speed signal in synchronization with the selected oscillation signal.

Claims (37)

1. A signal generation circuit, comprising:

a phase difference detector configured to detect a phase difference between a certain oscillation signal of a plurality of oscillation signals and a predetermined reference signal;

an oscillator to which a plurality of delay elements are connected annularly, the oscillator being configured to generate the plurality of oscillation signals depending on the detected phase difference;

a low-speed signal generation circuit configured to generate a low-speed signal having a lower frequency than the oscillation signal;

a detection circuit configured to detect a difference between a predetermined reference timing and a timing at which the low-speed signal has changed;

a selection unit configured to select the oscillation signal so that the phase difference with respect to the reference signal is close to the detected difference; and

an output unit configured to externally output the generated low-speed signal in synchronization with the selected oscillation signal.

2. The signal generation circuit according to claim 1 , wherein

the low-speed signal generation circuit is configured to generate the low-speed signal in synchronization with an operation signal that has divided any one of the plurality of oscillation signals.

3. The signal generation circuit according to claim 1 , further comprising

an operation signal generation circuit configured to generate a signal in synchronization with the reference signal as an operation signal, the low-speed signal generation circuit being configured to generate the low-speed signal in synchronization with the operation signal.

4. The signal generation circuit according to claim 1 , wherein

the low-speed signal generation circuit includes

an integrator configured to generate an integration value by integrating an input value in synchronization with a predetermined operation signal, and

a low-speed signal generator configured to generate, as the low-speed signal, a signal that represents whether or not the integration value exceeds a predetermined value representing the reference timing in synchronization with the operation signal, and

the detection circuit is configured to detect a difference between a maximum value of the integration value in a cycle of the low-speed signal and the predetermined value.

5. The signal generation circuit according to claim 1 , further comprising

a phase comparison circuit configured to compare a phase of an input signal and a phase of the output low-speed signal, and to supply the phase difference there between, the low-speed signal generation circuit being configured to generate the low-speed signal based on the supplied phase difference.

6. An electronic apparatus, comprising:

a phase difference detector configured to detect a phase difference between a certain oscillation signal of a plurality of oscillation signals and a predetermined reference signal;

an oscillator to which a plurality of delay elements are connected annularly, the oscillator being configured to generate the plurality of oscillation signals depending on the detected phase difference;

a low-speed signal generation circuit configured to generate a low-speed signal having a lower frequency than the oscillation signal;

a detection circuit configured to detect a difference between a predetermined reference timing and a timing at which the low-speed signal has changed;

a selection unit configured to select the oscillation signal so that the phase difference with respect to the reference signal is close to the detected difference;

an output unit configured to output the generated low-speed signal in synchronization with the selected oscillation signal; and

an operation circuit configured to operate in synchronization with the output low-speed signal from the output unit.

7. The electronic apparatus according to claim 6 , wherein

the low-speed signal generation circuit is configured to generate the low-speed signal in synchronization with an operation signal that has divided any one of the plurality of oscillation signals.

8. The electronic apparatus according to claim 6 , further comprising

an operation signal generation circuit configured to generate a signal in synchronization with the reference signal as an operation signal, the low-speed signal generation circuit being configured to generate the low-speed signal in synchronization with the operation signal.

9. The electronic apparatus according to claim 6 , wherein

the low-speed signal generation circuit includes

an integrator configured to generate an integration value by integrating an input value in synchronization with a predetermined operation signal, and

a low-speed signal generator configured to generate, as the low-speed signal, a signal that represents whether or not the integration value exceeds a predetermined value representing the reference timing in synchronization with the operation signal, and

the detection circuit is configured to detect a difference between a maximum value of the integration value in a cycle of the low-speed signal and the predetermined value.

10. The electronic apparatus according to claim 6 , further comprising

a phase comparison circuit configured to compare a phase of an input signal and a phase of the output low-speed signal, and to supply the phase difference there between, the low-speed signal generation circuit being configured to generate the low-speed signal based on the supplied phase difference.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ZIP CODE FROM 246-0014 TO 243-0014 PREVIOUSLY RECORDED AT REEL: 039645 FRAME: 0019. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 13, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040894/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 039645/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2015
From: AKUTAGAWA, KAZUKI; TSUKUDA, YASUNORI; NAKAMOTO, EIICHI; SEKIYA, AKITO
To: SONY CORPORATION
Reel/Frame 034867/0414 →
Priority Claims (1)
JP 2014-023332 · Feb 10, 2014 · national
Continuity (1)
Related Publication 20150229313A1 · Aug 13, 2015