Shielding regions for photonic integrated circuits
Described herein are methods, systems, and apparatuses to utilize shielding regions formed in photonic integrated circuits (PICs). Portions of layers of a PIC are selectively removed, and optionally, replaced with another material. These regions are formed to block stray light from interacting with optical components of the PIC, and therefore can prevent optical crosstalk and/or noise. Metal or another absorption/reflective material can be deposited in the place of the removed layer portions of the PIC to absorb or reflect light. Additionally, by depositing metal, RF isolation can be achieved by forming a ground plane, by forming a ground trace that shields a signal trace in an RF transmission line, or by placing a conductor which terminates electric fields between sensitive RF receivers and adjacent RF elements. Additionally the process operations required to perform isolation can also be used to change the thermal conductivity of devices and regions on a PIC.
1. A photonic integrated circuit, comprising:
a substrate;
a buried oxide layer disposed on a first surface of the substrate;
an active device layer disposed on the buried oxide layer;
an optical transceiver including an optical transmission component and an optical reception component formed, at least in part, from the active device layer; and
an etched region formed on the photonic integrated circuit and extending through the substrate, the etched region configured to optically and electrically shield the optical reception component from the optical transmission component.
2. The photonic integrated circuit of claim 1 , wherein the etched region is filled.
3. The photonic integrated circuit of claim 1 , wherein the etched region is formed between the optical transmission component of the optical transceiver and the optical reception component of the optical transceiver.
4. The photonic integrated circuit of claim 3 , wherein the etched region comprises at least one of:
an etch of the active layer extending to the buried oxide layer; or
an etch of the active layer and the buried oxide layer extending to the first surface of the substrate.
5. The photonic integrated circuit of claim 1 , wherein the etched region is formed on a second surface of the substrate opposite the first surface of the substrate.
6. The photonic integrated circuit of claim 5 , wherein the etched region is formed under the optical reception component of the optical transceiver.
7. The photonic integrated circuit of claim 1 , wherein the optical reception component further includes one or more electrical contacts, and wherein the etched region is filled with a metal material to contact at least one of the electrical contacts of the optical reception component to form a radio frequency ground plane for the optical reception component.
8. The photonic integrated circuit of claim 1 , wherein the etched region is to further thermally isolate the first transmission component from the second reception component.
9. A photonic integrated circuit, comprising:
a substrate;
a buried oxide layer disposed on a first surface of the substrate;
an active device layer disposed on the buried oxide layer;
a first optical component and a second optical component formed, at least in part, from the active device layer; and
an etched region formed on the photonic integrated circuit and extending through the substrate, the etched region filled with a material that optically and electrically shields the second optical component from the first optical component.
10. The photonic integrated circuit of claim 9 , wherein the etched region is formed between the first and second optical components.
11. The photonic integrated circuit of claim 10 , wherein the etched region comprises at least one of:
an etch of the active layer extending to the buried oxide layer; or
an etch of the active layer and the buried oxide layer extending to the first surface of the substrate.
12. The photonic integrated circuit of claim 9 , wherein the etched region is formed on a second surface of the substrate opposite the first surface of the substrate.
13. The photonic integrated circuit of claim 12 , wherein the etched region is formed under one of the first or the second optical component.
14. The photonic integrated circuit of claim 9 , wherein the first or the second optical component above the etched region further includes one or more electrical contacts, and wherein the etched region is filled with a metal material to contact at least one of the electrical contacts to form a radio frequency ground plane for the first or the second optical component above the etched region.
15. The photonic integrated circuit of claim 9 , wherein the etched region is to further thermally isolate the first or the second optical component above the etched region.
16. The photonic integrated circuit of claim 9 , wherein the first and second optical components comprise a same component type.
17. The photonic integrated circuit of claim 9 , wherein the first optical component comprises an optical transmission component, and the second optical component comprises an optical reception component.