Wideband tuner architecture
View Patent ↗A wideband receiver system comprises a mixer module, a wideband analog-to-digital converter (ADC) module, and digital circuitry. The mixer module is configured to downconvert a plurality of frequencies that comprises a plurality of desired television channels and a plurality of undesired television channels. The wideband ADC module is configured to digitize the swatch of frequencies comprising the plurality of desired television channels and the plurality of undesired television channels. The digital circuitry is configured to select the desired plurality of television channels from the digitized plurality of frequencies, and output the selected plurality of television channels to a demodulator as a digital datastream.
1. A wideband receiver system comprising:
a mixer module configured to downconvert a plurality of frequencies that comprises a plurality of desired television channels and a plurality of undesired television channels;
a wideband analog-to-digital converter (ADC) module configured to digitize said plurality of frequencies comprising said plurality of desired television channels and said plurality of undesired television channels;
digital circuitry configured to:
select said plurality of desired television channels from said digitized plurality of frequencies; and
output said selected plurality of television channels to a demodulator as a digital datastream.
2. The wideband receiver system of claim 1 , wherein said output of said digital datastream is via a serial interface.
3. The wideband receiver system of claim 1 , wherein said output of said digital datastream is via a parallel interface.
4. The wideband receiver system of claim 1 , wherein said mixer module comprises a first mixer configured to generate an in-phase signal and a second mixer configured to generate a quadrature signal.
5. The wideband receiver system of claim 1 , wherein said wideband analog-to-digital converter comprises:
a first ADC configured to generate a digital in-phase signal; and
a second ADC configured to generate a digital quadrature signal.
6. The wideband receiver system of claim 5 , wherein said digital circuitry comprises a plurality of complex mixers configured to frequency shift said selected plurality of desired television channels.
7. The wideband receiver system of claim 6 , wherein:
prior to said frequency shift, said selected plurality of desired television channels occupy non-contiguous portions of a frequency spectrum; and
after said frequency shift, said selected plurality of desired television channels occupy a contiguous frequency spectrum.
8. The wideband receiver system of claim 1 , wherein said digital circuitry comprises a plurality of channel filters configured to perform said selection of said plurality of desired television channels.
9. The wideband receiver system of claim 8 , wherein each one of said plurality of channel filters is a finite impulse response filter.
10. The wideband receiver system of claim 1 , wherein said digital circuitry comprises a decimator circuit configured to decimate one or more of said selected plurality of television channels prior to said output of said selected plurality of desired television channels.
11. A method comprising:
in a wideband receiver system:
downconverting, by a mixer module of said wideband receiver system, a plurality of frequencies that comprises a plurality of desired television channels and a plurality of undesired television channels;
digitizing, by a wideband analog-to-digital converter (ADC) module of said wideband receiver system, said plurality of frequencies comprising said plurality of desired television channels and said plurality of undesired television channels;
selecting, by digital circuitry of said wideband receiver system, said plurality of desired television channels from said digitized plurality of frequencies; and
outputting, by said digital circuitry of said wideband receiver system, said selected plurality of television channels to a demodulator as a digital datastream.
12. The method of claim 11 , comprising outputting, by said digital circuitry of said wideband receiver system, said digital datastream via a serial interface.
13. The method of claim 11 , comprising outputting, by said digital circuitry of said wideband receiver system, said digital datastream via a parallel interface.
14. The method of claim 11 , comprising:
generating, by a first mixer of said mixer module, an in-phase signal; and
generating, by a second mixer of said mixer module, a quadrature signal.
15. The method of claim 11 , comprising:
generating, via a first ADC of said wideband analog-to-digital converter, a digital in-phase signal; and
generating, via a second ADC of said wideband analog-to-digital converter, a digital quadrature signal.
16. The method of claim 15 , comprising frequency shifting said selected plurality of desired television channels via a plurality of complex mixers of said digital circuitry.
17. The method of claim 16 , wherein:
prior to said frequency shifting, said selected plurality of desired television channels occupy non-contiguous portions of a frequency spectrum; and
after said frequency shifting, said selected plurality of desired television channels occupy a contiguous frequency spectrum.
18. The method of claim 11 , wherein said digital circuitry comprises a plurality of channel filters configured to perform said selecting.
19. The method of claim 18 , wherein each one of said plurality of channel filters is a finite impulse response filter.
20. The method of claim 11 , comprising decimating, by said digital circuitry, one or more of said selected plurality of desired television channels prior to said outputting of said selected plurality of television channels.