Method and system for receiver configuration based on a priori knowledge of noise
View Patent ↗A signal receiver may be configured to determine when signal generation adjustments directed to particular components of signals received by the signal receiver, cause performance changes relating to effects of the signal generation adjustments on other components of the received signals. Operations of the signal receiver may then be controlled based on the performance changes, to mitigate at least some of the effects on the one or more other components of the signals. The performance changes may comprise amplitude glitches, phase glitches, and/or bit or packet errors. The signal generation adjustments may comprise channel-to-frequency re-assignment. Controlling operations of the signal receiver may comprise adjusting such parameters as amplification gain and/or tracking loop bandwidth, and/or determining whether (or not) to ignore bit/packet errors.
1. A system, comprising:
one or more circuits in a signal receiver, the one or more circuits are operable to:
determine signal generation adjustments directed to one or more components of signals generated by the signal receiver;
determine when application of the signal generation adjustments causes performance changes that have undesired effects on one or more other components of the signals generated by the signal receiver, wherein the one or more other components are intended to remain unchanged when said signal generation adjustments are applied; and
control operations of the signal receiver based on said performance changes, wherein:
the controlling is configured to mitigate at least some of the effects on the one or more other components of the signals when said signal generation adjustments are applied;
the controlling comprises ignoring bit or packet errors occurring during said signal generation adjustments, the signal receiver being operable to otherwise handle bit or packet error by reacquiring input signals; and
the bit or packet errors occurring during said signal generation adjustments are ignored based on a determination that tracking loops used in the signal receiver remain locked.
2. The system of claim 1 , wherein said signal generation adjustments comprise frequency re-assignment.
3. The system of claim 1 , wherein said performance changes comprise one or more of amplitude glitches, phase glitches, and bit or packet errors.
4. The system of claim 1 , wherein said control of operations of the signal receiver comprises adjusting one or more parameters used during signal processing in the signal receiver.
5. The system of claim 4 , wherein said one or more parameters used during signal processing in the signal receiver comprise amplification gain and/or tracking loop bandwidth.
6. The system of claim 1 , wherein the signal receiver is operable to receive and process satellite signals captured via a satellite reception assembly.
7. The system of claim 1 , wherein the signal receiver is operable to handled channel-stacked signals.
8. A method, comprising:
in a signal receiver:
determining signal generation adjustments directed to one or more components of signals generated by the signal receiver;
determining when application of the signal generation adjustments causes performance changes that have undesired effects on one or more other components of the signals received by the signal receiver, wherein the one or more other components are intended to remain unchanged when said signal generation adjustments are applied; and
controlling operations of the signal receiver based on said performance changes, wherein the controlling is configured to mitigate at least some of the effects on the one or more other components of the signals when said signal generation adjustments are applied;
wherein:
said controlling comprises ignoring bit or packet errors occurring during said signal generation adjustments, wherein such bit or packet errors are handled otherwise by reacquiring input signals; and
ignoring said bit or packet errors occurring during said signal generation adjustments is based on a determination that tracking loops used in the signal receiver remain locked.
9. The method of claim 8 , wherein said signal generation adjustments comprise frequency re-assignment.
10. The method of claim 8 , wherein said performance changes comprise one or more of amplitude glitches, phase glitches, and bit or packet errors.
11. The method of claim 8 , wherein said controlling of operations of the signal receiver comprises adjusting one or more parameters used during signal processing in the signal receiver.
12. The method of claim 11 , wherein said one or more parameters used during signal processing in the signal receiver comprise amplification gain and/or tracking loop bandwidth.
13. A system, comprising:
a signal receiver that comprises:
signal processing circuitry that is operable to process signals, the signal processing circuitry comprising a tuner circuit, an amplifier circuit, an analog-to-digital convertor (ADC) circuit, and a demodulator circuit; and
controller circuitry that is operable to:
determine signal generation adjustments directed to one or more components of signals generated by the signal receiver;
determine when application of the signal generation adjustments causes performance changes that have undesired effects on one or more other components of the signals generated by the signal receiver, wherein the one or more other components are intended to remain unchanged when said signal generation adjustments are applied; and
control operations of the signal receiver based on said performance changes, wherein the controlling is configured to mitigate at least some of the effects on the one or more other components of the signals when said signal generation adjustments are applied; wherein said controlling comprises:
determining when bit or packet errors occur during said signal generation adjustments; and
ignoring the bit or packet errors based on a determination that tracking loops used in the signal receiver remain locked, the signal receiver being configured to otherwise handle bit or packet error by reacquiring input signals.
14. The system of claim 13 , wherein said performance changes comprise one or more of amplitude glitches, phase glitches, and bit or packet errors.
15. The system of claim 13 , wherein:
the signal receiver comprises a gain controller circuit; and
the controlling of operations of the signal receiver comprises adjusting gain parameters generated by the gain controller circuit, wherein at least one of the gain parameters is applied to the amplifier circuit.
16. The system of claim 13 , wherein:
the signal receiver comprises a carrier tracking loop (CTL) circuit; and
the controlling of operations of the signal receiver comprises adjusting tracking bandwidth utilized by the CTL circuit.
17. The system of claim 13 , wherein said controlling of operations of the signal receiver comprises adjusting set points applied to the ADC circuit.