IP Library Granted Patent US 9,437,669
Granted Patent B2
US 9,437,669 · App. 14/617,572 · Granted Sep 6, 2016

Semiconductor device

Inventors: Hirofumi Harada (Chiba, JP); Masaru Akino (Chiba, JP)
Assignee: SII SEMICONDUCTOR CORPORATION
H01L28/20H01L27/0802
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,437,669
App. No.
14/617,572
Granted
Sep 6, 2016
Kind
B2
Abstract

A semiconductor resistor circuit has resistor elements of a polycrystalline silicon thin film formed on an insulating film deposited on a semiconductor substrate. A high stress insulating film is formed on and covers the resistor elements and the insulating film exposed between the resistor elements. Metal wirings cover upper portions of the resistor elements. The high stress insulating film has a membrane stress that is higher than that of the metal wirings.

Claims (17)

1. A semiconductor device, comprising:

a semiconductor substrate;

a first insulating film of a silicon oxide film formed on the semiconductor substrate;

a plurality of resistor elements of a polycrystalline silicon thin film formed on the first insulating film, the plurality of resistor elements being spaced from one another on the first insulating film and each of the plurality of resistor elements having a low concentration impurity region and a high concentration impurity region;

a high stress insulating film formed on and covering the plurality of resistor elements and the first insulating film exposed between the resistor elements;

a second insulating film covering a periphery of the high stress insulating film; and

a plurality of metal wirings covering the low concentration impurity region of the plurality of resistor elements, one end of each of the plurality of metal wirings being electrically connected to one end of the plurality of resistor elements,

wherein the high stress insulating film is formed in a region in which the plurality of resistor elements are arranged and which is larger than a region of the plurality of metal wirings, and the high stress insulating film has one of a compressive stress and a tensile stress that is higher than one of a compressive stress and a tensile stress of the each of the plurality of metal wirings.

2. A semiconductor device according to claim 1 , further comprising a second high stress insulating film formed between the first insulating film and the plurality of resistor elements, the second high stress insulating film having one of a compressive stress and a tensile stress that is higher than the one of the compressive stress and the tensile stress of the each of the plurality of metal wirings.

3. A semiconductor device according to claim 1 , wherein the high stress insulating film has one of a compressive stress of 500 MPa or more and a tensile stress of 500 MPa or more.

4. A semiconductor device according to claim 3 , wherein the high stress insulating film comprises one of a single-layer film formed of any one of SiC, SiON, and SiCN and a multilayer film formed of a combination of different films.

5. A semiconductor device according to claim 3 , wherein the high stress insulating film comprises a silicon nitride film formed by low pressure CVD.

6. A semiconductor device according to claim 5 , wherein the high stress insulating film has a thickness of 0.15 μm or more.

7. A semiconductor device according to claim 1 , wherein the plurality of resistor elements are arranged in resistor groups, each resistor group contains plural resistor elements, and the metal wirings corresponding to the respective resistor groups have different areas.

8. A semiconductor device according to claim 1 , wherein the high stress insulating film is a single-layer film deposited on the plurality of resistor elements and on the first insulating film between the resistor element.

9. A semiconductor device according to claim 1 , wherein the high stress insulating film is a multi-layer film deposited on the plurality of resistor elements and on the first insulating film between the resistor element.

10. A semiconductor device according to claim 1 , wherein the high stress insulating film extends continuously without interruption over all of the resistor elements.

Assignments (4)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2015
From: HARADA, HIROFUMI; AKINO, MASARU
To: SEIKO INSTRUMENTS INC.
Reel/Frame 034922/0144 →
Priority Claims (1)
JP 2014-025808 · Feb 13, 2014 · national
Continuity (1)
Related Publication 20150228655A1 · Aug 13, 2015