IP Library Granted Patent US 9,578,699
Granted Patent B2
US 9,578,699 · App. 14/619,592 · Granted Feb 21, 2017

Control circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,578,699
App. No.
14/619,592
Granted
Feb 21, 2017
Kind
B2
Abstract

Provided is a control circuit capable of suppressing flickering of an LED while preventing degradation of the power efficiency. A control circuit is configured to control electric power to an LED illumination based on a rectified drive voltage, the rectified drive voltage being a drive signal rectified by a rectifier, the drive signal being an AC signal whose phase is controlled by a dimmer including a switching device. The control circuit includes a time period detection part configured to detect a time period in which a voltage value of the rectified drive voltage is less than or equal to a predetermined value; and a dimmer current control part configured so that a control current to the dimmer is greater than or equal to a holding current of the switching device during the time period detected.

Claims (23)

1. A control circuit configured to control electric power to a load based on a rectified drive signal, the rectified drive signal being a drive signal rectified by a rectifier, the drive signal being an alternating-current signal whose phase is controlled by a dimmer comprising a switching device, the control circuit comprising:

a time period detection part configured to detect a time period in which an amplitude of the rectified drive signal is less than or equal to a predetermined level, wherein the time period detection part is configured to output a detection signal including a pulse having a pulse width that is based on a time period in which the amplitude of the rectified drive signal is greater than the predetermined level; and

a dimmer current control part being configured so that a control current to the dimmer is greater than or equal to a holding current of the switching device during the time period.

2. The control circuit of claim 1 , wherein the dimmer current control part comprises:

a field-effect transistor configured such that the control current flows as a drain current of the field-effect transistor, and

a clamp circuit configured to clamp a gate voltage of the field-effect transistor to a predetermined value during the time period.

3. The control circuit of claim 2 , wherein the dimmer current control part

further comprises: a constant voltage circuit configured such that a drain voltage of the field-effect transistor becomes less than or equal to a predetermined value.

4. The control circuit of claim 3 , wherein the field-effect transistor is a low-voltage field-effect transistor.

5. The control circuit of claim 2 , wherein the dimmer current control part further comprises:

a control current circuit configured to control the gate voltage based on a feedback current from the load to the dimmer while the amplitude of the rectified drive signal is greater than the predetermined level.

6. The control circuit of claim 1 , wherein the time period detection part is configured to detect the time period in which the amplitude of the rectified drive signal is greater than the predetermined level.

7. The control circuit of claim 6 , further comprising: a load current control part configured to control a load current to the load based on a pulse density of the detection signal in a predetermined term.

8. A control circuit configured to control electric power to a load based on a rectified drive signal, the rectified drive signal being a drive signal rectified by a rectifier, the drive signal being an alternating-current signal whose phase is controlled by a dimmer comprising a switching device, the control circuit comprising:

a time period detection part configured to output a detection signal including a pulse whose pulse width is based on a time period in which an amplitude of the rectified drive signal is greater than a predetermined level; and

a load current control part configured to control a load current to the load based on a pulse density of the detection signal in a predetermined term.

9. The control circuit of claim 8 , wherein the load current control part comprises: a signal processing circuit configured to calculate the pulse density based on the detection signal.

10. The control circuit of claim 8 , wherein the predetermined term is longer than a period of the alternating-current signal.

11. A circuit comprising:

a dimmer, comprising a switching device, and configured to control a phase of an alternating-current signal, wherein the phase controlled alternating current signal is a drive signal;

a rectifier configured to rectify the drive signal;

a time period detection part configured to detect a time period in which an amplitude of the rectified drive signal is less than or equal to a predetermined level and output a detection signal including a pulse having a pulse width that is based on a time period in which the amplitude of the rectified drive signal is greater than the predetermined level; and

a dimmer current control part configured such that a control current to the dimmer is greater than or equal to a holding current of the switching device during the time period.

Assignments (9)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035902/0821 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2015
From: NISHIZONO, KAZUNORI
To: SPANSION LLC
Reel/Frame 035068/0198 →