IP Library Granted Patent US 9,209,826
Granted Patent B2
US 9,209,826 · App. 14/621,953 · Granted Dec 8, 2015

Radio frequency circuit

Inventors: Jonathan Ephraim David Hurwitz (Edinburgh, GB); Steven Collins (Lothian Region, GB)
Assignee: Broadcom Europe Limited
H03M1/765H04L27/34H04L27/362H04L27/3818
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Quick Facts
Patent No.
US 9,209,826
App. No.
14/621,953
Granted
Dec 8, 2015
Kind
B2
Abstract

A digital-to-analog conversion circuit operates by selectively charging or discharging members of a plurality of capacitors. Charging of the capacitors occurs during a reset period while digital-to-analog conversion occurs as the capacitors are discharged. Those capacitors that are charged or discharged are selected from the plurality of capacitors based on a digital input. The analog output includes the charge discharged from the selected capacitors.

Claims (59)

1. A digital-to-analog converter, comprising:

a digital input circuit for receiving a digital input signal;

a plurality of capacitors;

a plurality of recharge switches, each configured to recharge a respective one of the plurality of capacitors to a respective voltage;

a plurality of discharge switches, each configured to discharge a respective one of the plurality of capacitors; and

a control circuit coupled to the digital input circuit, the plurality of recharge switches and the plurality of discharge switches, the control circuit configured to:

determine a subset of the plurality of capacitors to be recharged based on the digital input signal;

recharge the subset of the plurality of capacitors using a corresponding subset of the plurality of recharge switches; and

discharge at least the subset of the plurality of capacitors using a corresponding subset of the plurality of discharge switches to produce an analog output signal that includes charge discharged from each capacitor within the subset of the plurality of capacitors.

2. The digital-to-analog converter of claim 1 , wherein the control circuit is further configured to:

close the corresponding subset of the plurality of recharge switches to charge the subset of the plurality of capacitors during a recharge period;

open the corresponding subset of the plurality of recharge switches to electrically disconnect the subset of the plurality of capacitors from one or more voltage sources during a conversion period; and

close at least the corresponding subset of the plurality of discharge switches during the conversion period to produce the analog output signal.

3. The digital-to-analog converter of claim 1 , further comprising:

an output circuit coupled to the plurality of discharge switches and configured to receive individual discharges from each capacitor within the subset of the plurality of capacitors and to combine the individual discharges to generate the analog output signal.

4. The digital-to-analog converter of claim 3 , wherein the output circuit further includes at least one storage capacitor configured to temporarily store the individual discharges.

5. The digital-to-analog converter of claim 1 , wherein the analog output signal is differential.

6. The digital-to-analog converter of claim 1 , further comprising:

a first bank including a first section of the plurality of capacitors coupled in parallel; and

a second bank including a second section of the plurality of capacitors coupled in parallel;

wherein the first bank and the second bank are coupled in parallel.

7. The digital-to-analog converter of claim 6 , wherein each of the first bank and the second bank is one of a thermometer bank and a binary bank.

8. The digital-to-analog converter of claim 1 , wherein the analog output signal includes a mixture of a frequency content of the digital input signal and a sampling frequency of the digital-to-analog converter.

9. A digital-to-analog converter, comprising:

a digital input circuit for receiving a digital input signal;

a plurality of capacitors, each configured to be charged to a respective voltage;

a plurality of discharge switches, each configured to discharge a respective one of the plurality of capacitors; and

a control circuit coupled to the digital input circuit and the plurality of discharge switches, the control circuit configured to:

determine a subset of the plurality of capacitors to be discharged based on the digital input signal; and

discharge the subset of the plurality of capacitors using a corresponding subset of the plurality of discharge switches to produce an analog output signal that includes charge discharged from each capacitor within the subset of the plurality of capacitors.

10. The digital-to-analog converter of claim 9 , further comprising:

a plurality of recharge switches, each configured to be recharge a respective one of the plurality of capacitors to a respective voltage.

11. The digital-to-analog converter of claim 10 , wherein the control circuit is further configured to:

close the plurality of recharge switches to charge the plurality of capacitors during a recharge period;

open the subset of the plurality of recharge switches to electrically disconnect the subset of the plurality of capacitors from one or more voltage sources during a conversion period; and

close the subset of the plurality of discharge switches during the conversion period to produce the analog output signal.

12. The digital-to-analog converter of claim 9 , further comprising:

an output circuit coupled to the plurality of discharge switches and configured to receive individual discharges from each capacitor within the subset of the plurality of capacitors and to combine the individual discharges to generate the analog output signal.

13. The digital-to-analog converter of claim 12 , wherein the output circuit further includes at least one storage capacitor configured to temporarily store the individual discharges.

14. The digital-to-analog converter of claim 9 , wherein the analog output signal is differential.

15. The digital-to-analog converter of claim 9 , further comprising:

a first bank including a first section of the plurality of capacitors coupled in parallel; and

a second bank including a second section of the plurality of capacitors coupled in parallel;

wherein the first bank and the second bank are coupled in parallel.

16. The digital-to-analog converter of claim 9 , wherein the analog output signal includes a mixture of a frequency content of the digital input signal and a sampling frequency of the digital-to-analog converter.

17. A method of converting a digital input signal to an analog output signal, the method comprising:

receiving the digital input signal;

determining a subset of a plurality of capacitors of a digital-to-analog converter to be recharged or discharged based on the digital input signal;

recharging at least the subset of the plurality of capacitors using a corresponding subset of a plurality of recharge switches; and

discharging at least the subset of the plurality of capacitors using a corresponding subset of a plurality of discharge switches to produce an analog output signal that includes charge discharged from each capacitor within the subset of the plurality of capacitors.

18. The method of claim 17 , further comprising:

closing the corresponding subset of the plurality of recharge switches to charge the subset of the plurality of capacitors at the same time during a recharge period;

opening the corresponding subset of the plurality of recharge switches to electrically disconnect the subset of the plurality of capacitors from one or more voltage sources during a conversion period; and

closing at least the corresponding subset of the plurality of discharge switches during the conversion period to produce the analog output signal.

19. The method of claim 17 , further comprising:

closing the plurality of recharge switches to charge the plurality of capacitors during a recharge period;

opening the corresponding subset of the plurality of recharge switches to electrically disconnect the subset of the plurality of capacitors from one or more voltage sources during a conversion period; and

closing the corresponding subset of the plurality of discharge switches during the conversion period to produce the analog output signal.

20. The method of claim 17 , wherein the analog output signal includes a mixture of a frequency content of the digital input signal and a sampling frequency of the digital-to-analog converter.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2018
From: BROADCOM EUROPE LIMITED
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 046019/0030 →
CHANGE OF NAME Recorded Apr 22, 2015
From: GIGLE NETWORKS LIMITED
To: BROADCOM NETWORKS (EDINBURGH) LIMITED
Reel/Frame 035468/0921 →
BUSINESS TRANSFER Recorded Apr 22, 2015
From: BROADCOM NETWORKS (EDINBURGH) LIMITED
To: BROADCOM EUROPE LIMITED
Reel/Frame 035476/0926 →
Continuity (3)
Continuation 13536104 · Jun 28, 2012
Division 12564810 · Sep 22, 2009
Related Publication 20150155881A1 · Jun 4, 2015