IP Library Granted Patent US 9,647,031
Granted Patent B2
US 9,647,031 · App. 14/630,498 · Granted May 9, 2017

Memory device and manufacturing method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,647,031
App. No.
14/630,498
Granted
May 9, 2017
Kind
B2
Abstract

A memory device includes a substrate, first and second wirings above the substrate, a third wiring above the first and second wirings, a fourth wiring above the third wiring, a first contact electrically connected between the first wiring and the fourth wiring, a first insulator on the first contact, and a second contact on the first insulator, the second contact being electrically connected between the second wiring and the third wiring. The first contact overlaps the second contact in a direction that is orthogonal to an upper surface of the substrate.

Claims (33)

1. A memory device, comprising:

a substrate;

first and second wirings above the substrate;

a third wiring above the first and second wirings;

a fourth wiring above the third wiring;

a first contact electrically connected between the first wiring and the fourth wiring;

a first insulator on the first contact; and

a second contact on the first insulator, the second contact being electrically connected between the second wiring and the third wiring,

wherein the first contact overlaps the second contact in a direction that is orthogonal to an upper surface of the substrate, and wherein a width of the first contact adjacent to the fourth wiring is greater than a width of the second contact adjacent to the third wiring.

2. The device according to claim 1 , wherein the second contact overlaps at least a part of the second wiring in the direction that is orthogonal to the upper surface of the substrate.

3. The device according to claim 1 , further comprising:

a third contact below the first wiring and electrically connected to the first wiring.

4. The device according to claim 1 , further comprising:

a fifth wiring at the same level as the first and second wirings;

a sixth wiring above the first, second, and fifth wirings and below the third wiring; and

a fourth contact electrically insulated from the first and second contacts and electrically connected between the fifth and sixth wirings.

5. The device according to claim 4 , wherein the first contact overlaps the second and fourth contacts in the direction that is orthogonal to the upper surface of the substrate, and the second contact overlaps the fourth contact in the direction that is orthogonal to the upper surface of the substrate.

6. A memory device, comprising:

a substrate;

a first wiring above the substrate;

second wirings above the substrate adjacent to the first wiring;

third wirings above the first and second wirings;

fourth wirings above the third wirings;

a first contact electrically connected between the first wiring and the fourth wirings;

a first insulator on the first contact; and

a second contact on the first insulator, the second contact being electrically connected between the second wirings and the third wirings,

wherein the first contact overlaps the second contact in a direction that is orthogonal to an upper surface of the substrate.

7. The device according to claim 6 , wherein a distance between the fourth wirings is greater than a distance between the third wirings.

8. The device according to claim 6 , wherein a width of the first contact between the fourth wirings is greater than a width of the first contact between the third wirings.

9. The device according to claim 6 , wherein a width of the first contact between the third wirings is greater than a width of the first contact adjacent to the first wiring.

10. The device according to claim 6 , wherein the second contact overlaps at least a part of the second wiring in the direction that is orthogonal to the upper surface of the substrate.

11. The device according to claim 6 , further comprising:

a third contact below the first wiring and electrically connected to the first wiring.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2015
From: NISHIHARA, KIYOHITO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035611/0907 →