Reference voltage generating device and method

1. A reference voltage generating device, configured to receive a power voltage and generate a reference voltage, the reference voltage generating device comprising:

a reference voltage source, having an output terminal generating the reference voltage;

a charge supplying source, connected to the power voltage;

a first switch, having a first terminal coupled to the reference voltage source;

a second switch, having a first terminal coupled to the charge supplying source;

a charge storage unit, coupled to a second terminal of the first switch and a second terminal of the second switch that is served as an output terminal of the reference voltage generating device, the charge storage unit configured to store charges and generate an output voltage at the output terminal of the reference voltage generating device; and

a logic unit, receiving the reference voltage, the output voltage and a power on reset signal to control the first switch and the second switch,

wherein when the power on reset signal is received, the first switch is turned off and the second switch is turned on, such that the charge supplying source charges the charge storage unit, and when the output voltage is greater than or equal to the reference voltage, the first switch is turned on and the second switch is turned off, such that the reference voltage source maintains the output voltage to the reference voltage.

2. The reference voltage generating device as claimed in claim 1 , wherein the logic unit comprises:

a comparator, having a non-inverted input terminal receiving the reference voltage, an inverted input terminal receiving the output voltage, and configured to determine whether the output voltage is greater than or equal to the reference voltage.

3. The reference voltage generating device as claimed in claim 2 , wherein the comparator further comprises a power control terminal for receiving a power control signal to determine whether to turn off a power of the comparator.

4. The reference voltage generating device as claimed in claim 2 , wherein the logic unit further comprises:

a first OR gate, having a first input terminal coupled to an output terminal of the comparator, and a second input terminal receiving the power on reset signal, wherein a power control terminal of the comparator is coupled to an output terminal of the first OR gate; and

a first inverter, having an input terminal coupled to the output terminal of the first OR gate,

wherein a control terminal of the first switch is coupled to an output terminal of the first inverter, a control terminal of the second switch is coupled to the output terminal of the first OR gate, and the first switch and the second switch are implemented by an N-type metal oxide semiconductor field effect transistor(MOSFET) or a P-type MOSFET.

5. The reference voltage generating device as claimed in claim 2 , wherein the logic unit further comprises:

a first OR gate, having a first input terminal coupled to an output terminal of the comparator, and a second input terminal receiving the power on reset signal;

a first inverter, having an input terminal coupled to an output terminal of the first OR gate;

a second inverter, having an input terminal receiving the power on reset signal;

a second OR gate, having a first input terminal coupled to an output terminal of the first inverter, a second input terminal receiving the power on reset signal; and

an AND gate, having a first input terminal coupled to the output terminal of the first inverter, and a second input terminal coupled to an output terminal of the second inverter,

wherein a control terminal of the first switch is coupled to an output terminal of the AND gate, a control terminal of the second switch is coupled to an output terminal of the second OR gate, the first switch is implemented by an N-type MOSFET, and the second switch is implemented by a P-type MOSFET.

6. The reference voltage generating device as claimed in claim 2 , wherein the logic unit further comprises:

a first OR gate, having a first input terminal coupled to an output terminal of the comparator, and a second input terminal receiving the power on reset signal; and

a first inverter, having an input terminal coupled to an output terminal of the first OR gate,

wherein control terminals of the first switch and the second switch are coupled to an output terminal of the first inverter, the first switch is implemented by an N-type MOSFET, and the second switch is implemented by a P-type MOSFET.

7. The reference voltage generating device as claimed in claim 1 , wherein the logic unit further comprises:

a third switch, having a first terminal coupled to the charge storage unit, a second terminal coupled to the ground, and a control terminal receiving the power on reset signal, wherein when the power on reset signal is received, the third switch is turned on to clear the charges in the charge storage unit.

8. The reference voltage generating device as claimed in claim 1 , further comprising:

a resistor, coupled between the second terminal of the first switch and the charge storage unit.

9. A method for generating a reference voltage, comprising:

charging a charge storage unit by using a charge supplying source, wherein the charge storage unit provides an output voltage;

stopping charging the charge storage unit by the charge supplying source when the output voltage provided by the charge storage unit is greater than or equal the reference voltage of a reference voltage source, and maintaining the output voltage by using a reference voltage source.

10. The method for generating the reference voltage as claimed in claim 9 , wherein

whether the output voltage is greater than or equal to the reference voltage is determined by a comparator, and the comparator having a non-inverted input terminal receiving the reference voltage and an inverted input terminal receiving the output voltage.

11. The method for generating the reference voltage as claimed in claim 10 , wherein the comparator further comprises a power control terminal for receiving a power control signal to determine whether to turn off a power of the comparator.

12. The method for generating the reference voltage as claimed in claim 9 , wherein

the reference voltage source is controlled by a first switch, and a first terminal of the first switch is coupled to an output terminal of the reference voltage source;

the charge storage unit is controlled by a second switch , and a first terminal of the second switch is coupled to the charge supplying source; and

the reference voltage of the reference voltage source is received by a logic unit, and the output signal and a power on reset signal is used for controlling the first switch and the second switch.

13. The method for generating the reference voltage as claimed in claim 12 , wherein

when the power on reset signal is received, the first switch is turned off and the second switch is turned on, such that the charge supplying source charges the charge storage unit.

14. The method for generating the reference voltage as claimed in claim 12 , wherein

when the output voltage is greater than or equal to the reference voltage, the first switch is turned on and the second switch is turned off, such that the reference voltage source maintains the output voltage to the reference voltage.

15. The method for generating the reference voltage as claimed in claim 12 , wherein

the first switch is implemented by an N-type MOSFET, and the second switch is implemented by a P-type MOSFET.