IP Library Granted Patent US 9,785,203
Granted Patent B1
US 9,785,203 · App. 14/633,102 · Granted Oct 10, 2017

Flex cable interface

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Quick Facts
Patent No.
US 9,785,203
App. No.
14/633,102
Granted
Oct 10, 2017
Kind
B1
Abstract

Systems and methods are disclosed for transmitting data between printed circuit board assemblies (PCBAs) using a flexible, non-impedance-controlled data transmission cable coupled between the boards and treating the received signal with re-driver circuitry configured to boost a data signal according to a communication interface standard.

Claims (43)

1. A computing device comprising:

a first printed circuit board assembly (PCBA) comprising:

a processor;

interface controller circuitry associated with a communication interface;

a first physical connector structure; and

a first interface bus configured to communicatively couple the interface controller circuitry to the physical connector structure according to the communication interface;

a second PCBA comprising:

a second physical connector structure;

first re-driver circuitry configured to boost a data signal according to the communication interface;

a second interface bus configured to communicatively couple the second physical connector structure to the first re-driver circuitry; and

a flexible, non-impedance-controlled data transmission cable that does not include a ground reference coupled to the first physical connector structure at a first end and to the second physical connector structure at a second end; wherein the first re-driver circuitry is configured to compensate for signal loss introduced by a non-impedance-controlled nature of the data transmission cable.

2. The computing device of claim 1 , further comprising:

a housing configured to at least partially house the first PCBA and the second PCBA, the housing including a front panel; and

an interface port configured to receive an interface connector associated with the communication interface, the interface port being physically coupled to the second PCBA;

wherein the interface port is accessible via an aperture in the front panel.

3. The computing device of claim 1 , wherein the communication interface is a Universal Serial Bus (USB) interface.

4. The computing device of claim 1 , wherein the communication interface is a Peripheral Component Interconnect Express (PCIe) interface.

5. The computing device of claim 1 , wherein the first PCBA further comprises second re-driver circuitry that is configured to at least partially compensate for signal loss introduced by the non-impedance-controlled nature of the data transmission cable for signals transmitted from the second PCBA to the first PCBA.

6. The computing device of claim 1 , wherein the data transmission cable comprises at least 40 parallel transmission lines.

7. The computing device of claim 1 , wherein the computing device is a data storage server device comprising a plurality of bays configured to receive a plurality of data storage devices.

8. A printed circuit board assembly (PCBA) comprising:

a physical connector structure;

re-driver circuitry configured to boost a data signal according to a communication interface;

an interface bus configured to communicatively couple the second physical connector structure to the re-driver circuitry; and

a physical interface port conforming to the communication interface;

wherein: the PCBA is configured to receive the data signal over a flexible, non-impedance-controlled data transmission cable that does not include a ground reference coupled to the physical connector structure and boost the data signal using the re-driver circuitry; and the re-driver circuitry is configured to compensate for signal loss introduced by a non-impedance-controlled nature of the data transmission cable.

9. The PCBA of claim 8 , wherein the PCBA is further configured to receive the data signal from a separate PCBA coupled to the data transmission cable.

10. The PCBA of claim 9 , wherein the PCBA is a front panel board assembly of a data storage server device and the separate PCBA is a main controller board of the data storage server device.

11. The PCBA of claim 8 , wherein: the PCBA is at least partially contained within a physical housing, the physical housing including a front panel; and the physical interface port is accessible via an aperture in the front panel.

12. The PCBA of claim 8 , wherein the communication interface is a Universal Serial Bus (USB) interface.

13. The PCBA of claim 8 , wherein the communication interface is a Peripheral Component Interconnect Express (PCIe) interface.

14. The PCBA of claim 8 , wherein the re-driver circuitry is further configured to at least partially compensate for signal loss introduced by the data transmission cable.

15. A method of processing data, the method comprising:

generating a data signal using a processor and interface controller circuitry of a first printed circuit board assembly (PCBA), the interface controller circuitry being associated with a communication interface;

transmitting the data signal to a first physical connector structure of the first PCBA over a first interface bus conforming to the communication interface;

transmitting the data signal to a second PCBA over a flexible, non-impedance-controlled data transmission cable that does not include a ground reference coupled to the first physical connector structure at a first end and to a second physical connector structure of a second PCBA at a second end;

providing the data signal to re-driver circuitry of the second PCBA over a second interface bus conforming to the communication interface; and

compensating for signal loss in the data signal attributable to a non-impedance-controlled nature of the data transmission cable using the re-driver circuitry of the second PCBA.

16. The method of claim 15 , further comprising providing the data signal over an interface port configured to receive an interface connector associated with the communication interface, the interface port being physically coupled to the second PCBA.

17. The method of claim 15 , wherein the first PCBA and the second PCBA are at least partially contained within a housing of a data storage server device, the housing including a front panel associated with the second PCBA.

18. The method of claim 15 , wherein the communication interface is a Universal Serial Bus (USB) interface or a Peripheral Component Interconnect Express (PCIe) interface.

19. The method of claim 15 , further comprising: transmitting data signals from the second PCBA to the first PCBA over the data transmission cable; and compensating for signal loss introduced by attributable to the non-impedance-controlled nature of the data transmission cable using re-driver circuitry of the first PCBA.

20. The method of claim 15 , wherein: said transmitting the data signal to the second PCBA over the data transmission cable comprises using a first plurality of wires of the transmission cable to transmit the data signal; and the method further comprises using a second plurality of wires of the transmission cable separate from the first plurality of wires to transmit a separate data signal, the separate data signal conforming to a separate communication interface.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2015
From: MARONEY, JOHN E.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 037316/0943 →