IP Library Granted Patent US 9,417,396
Granted Patent B2
US 9,417,396 · App. 14/639,041 · Granted Aug 16, 2016

Optoelectronic switch

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Quick Facts
Patent No.
US 9,417,396
App. No.
14/639,041
Granted
Aug 16, 2016
Kind
B2
Abstract

An optoelectronic switch comprising: N switch modules, where N is an integer; and an optical full-mesh interconnect; each switch module comprising: M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N; a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect; a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

Claims (55)

1. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising:

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

2. The optoelectronic switch of claim 1 , further comprising a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module.

3. The optoelectronic switch of claim 2 , further comprising a rearrangement AWG located after the second array of DRMs, the rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs; and each output port of the rearrangement AWG connected to an output of the switch module.

4. The optoelectronic switch of claim 3 , further comprising a final array of DRMs after the rearrangement AWG such that the connection between each of the output ports of the rearrangement AWG and an output port of the switch module is via one of the DRMs of the final array.

5. The optoelectronic switch of claim 1 , further comprising a rearrangement AWG located before the first array of DRMs, the rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs; and each input port of the rearrangement AWG connected to an input of the switch module.

6. The optoelectronic switch of claim 5 , further comprising an array of rearrangement DRMs located before the rearrangement AWG, each DRM of the array of rearrangement DRMs configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the rearrangement AWG.

7. The optoelectronic switch of claim 1 , wherein N>M.

8. The optoelectronic switch of claim 1 , wherein N<M.

9. The optoelectronic switch of claim 1 , wherein N=M.

10. The optoelectronic switch of claim 1 , wherein the optical full-mesh interconnect is an optical backplane.

11. The optoelectronic switch of claim 1 configured to act as a circuit switch.

12. The optoelectronic switch of claim 1 configured to act as a burst switch.

13. The optoelectronic switch of claim 1 configured to act as a packet switch.

14. The optoelectronic switch of claim 1 configured to act as a cell switch.

15. The optoelectronic switch of claim 1 , wherein the optical full-mesh interconnect has a folded configuration and each of the switch modules has a folded configuration, and wherein for each switch module:

the pre-mesh AWG is located before the fold; and

the post-mesh AWG located after the fold.

16. The optoelectronic switch of claim 15 , wherein the input and output ports of each switch module are all arranged on a single external panel.

17. The optoelectronic switch of claim 1 ; wherein the optoelectronic switch is constructed from silicon photonics.

18. An optoelectronic switch module for use with an optical full-mesh interconnect, the optoelectronic switch module comprising:

M client facing input ports, and M output facing ports, where M is an integer;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs where N is an integer which is either equal to or not equal to M, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG.

19. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising:

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG;

a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module;

a first rearrangement AWG located before the first array of DRMs, the first rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs; and each input port of the first rearrangement AWG connected to an input of the switch module; and

a second rearrangement AWG located after the second array of DRMs, the second rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs; and each output port of the second rearrangement AWG connected to an output of the switch module.

20. An optoelectronic switch comprising:

N switch modules, where N is an integer; and

an optical full-mesh interconnect;

each switch module comprising:

M client facing input ports, and M output facing ports, M being an integer which is either equal to or not equal to N;

a pre-mesh AWG, the pre-mesh AWG having M inputs and N outputs, each of the N outputs connected to a respective input on the optical full-mesh interconnect;

a post-mesh AWG, the post-mesh AWG having N inputs and M outputs, each of the N inputs connected to a respective output of the optical full-mesh interconnect and each of the M outputs for communicating a signal to one or more of the M outputs of the switch module; and

a first array of Detector Remodulators (DRMs) located before the pre-mesh AWG, each DRM of the first array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the pre-mesh AWG;

a second array of Detector Remodulators (DRMs) located after the post-mesh AWG, each DRM of the second array configured to regenerate and/or convert the wavelength of a signal from a respective output port of the post-mesh AWG for communication to an output port of the switch module;

a first rearrangement AWG located before the first array of DRMs, the first rearrangement AWG having M input ports and M output ports, each of the M output ports connected to an input of a respective DRM of the first array of DRMs; and each input port of the first rearrangement AWG connected to an input of the switch module;

a second rearrangement AWG located after the second array of DRMs, the second rearrangement AWG having M input ports and M output ports, each of the M input ports connected to an output of a respective DRM of the second array of DRMs; and each output port of the second rearrangement AWG connected to an output of the switch module;

an additional array of DRMs located before the first rearrangement AWG, each DRM of the additional array configured to receive a signal from an input of the switch module and to regenerate and/or change the wavelength of the received signal to produce a DRM output, the DRM output forming an input at a respective port of the first rearrangement AWG; and

a final array of DRMs located after the second rearrangement AWG such that the connection between each of the output ports of the second rearrangement AWG and an output port of the switch module is via one of the DRMs of the final array.

Assignments (11)
SECURITY INTEREST Recorded Mar 19, 2023
From: ROCKLEY PHOTONICS LIMITED
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS COLLATERAL AGENT
Reel/Frame 063287/0879 →
RELEASE OF PATENT SECURITY INTEREST - SUPER SENIOR INDENTURE - REEL/FRAME 061768/0082 Recorded Mar 19, 2023
From: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS COLLATERAL AGENT
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 063264/0416 →
RELEASE OF SECURITY INTEREST - REEL/FRAME 060204/0749 Recorded Mar 19, 2023
From: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS COLLATERAL AGENT
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 063264/0333 →
SECURITY INTEREST - SUPER SENIOR INDENTURE Recorded Oct 25, 2022
From: ROCKLEY PHOTONICS LIMITED
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS COLLATERAL AGENT
Reel/Frame 061768/0082 →
SECURITY INTEREST Recorded May 27, 2022
From: ROCKLEY PHOTONICS LIMITED
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS COLLATERAL AGENT
Reel/Frame 060204/0749 →
RELEASE OF SECURITY INTEREST Recorded May 18, 2022
From: SILICON VALLEY BANK
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 059948/0387 →
RELEASE OF SECURITY INTEREST Recorded May 18, 2022
From: KREOS CAPITAL V (UK) LIMITED
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 060116/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2017
From: RICKMAN, ANDREW; ROCKLEY VENTURES LIMITED
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 044502/0741 →
SECURITY INTEREST Recorded May 26, 2017
From: ROCKLEY PHOTONICS LIMITED
To: KREOS CAPITAL V (UK) LIMITED
Reel/Frame 042517/0968 →
SECURITY INTEREST Recorded Jan 27, 2017
From: ROCKLEY PHOTONICS LIMITED
To: SILICON VALLEY BANK
Reel/Frame 041108/0640 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2015
From: FARRINGTON, NATHAN; RICKMAN, ANDREW
To: ROCKLEY PHOTONICS LIMITED
Reel/Frame 035261/0177 →