IP Library Granted Patent US 10,109,561
Granted Patent B2
US 10,109,561 · App. 14/641,491 · Granted Oct 23, 2018

Semiconductor device having plated outer leads exposed from encapsulating resin

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Quick Facts
Patent No.
US 10,109,561
App. No.
14/641,491
Granted
Oct 23, 2018
Kind
B2
Abstract

A semiconductor device has a semiconductor chip mounted on an island of a lead frame and covered by an encapsulating resin. An outer lead extends from the encapsulating resin and is connected within the encapsulating resin to an inner lead connected to an inner lead suspension lead. A plated film is plated on the exposed surfaces of the outer lead that extend from the encapsulating resin to improve solder bonding strength of the semiconductor device onto a substrate.

Claims (24)

1. A semiconductor device, comprising:

a semiconductor chip mounted on an island;

an encapsulating resin having a plurality of side surfaces and covering the semiconductor chip;

an outer lead extending from a lower surface and a first side surface of the encapsulating resin and terminating in a cut surface;

an inner lead connected to and continuous with the outer lead and positioned at a different height from that of the outer lead by a stepped portion;

an inner lead suspension lead connected to the inner lead and having a cut surface exposed from a second side surface which is different from the first side surface of the encapsulating resin, the cut surface of the inner lead suspension lead being exposed from the second side surface at a same height as that of the inner lead;

an island suspension lead connected to the island and having a cut surface exposed from the encapsulating resin; and

a plated film formed on all surfaces of the outer lead not covered by the encapsulating resin,

wherein the outer lead, the inner lead and the inner lead suspension lead constitute a one-piece lead structure.

2. A semiconductor device according to claim 1 , wherein the cut surface of the inner lead suspension lead and the cut surface of the island suspension lead do not have the plated film thereon.

3. A semiconductor device according to claim 1 , wherein the number of the cut surfaces of the inner lead suspension lead exposed from the second side surface of the encapsulating resin and a number of the outer leads are the same.

4. A semiconductor device according to claim 1 , wherein the island and the inner lead are positioned at a height different from that of the outer lead in a thickness direction of the semiconductor device.

5. A semiconductor device according to claim 1 , wherein the cut surface of the inner lead suspension lead is exposed from the second side surface of the encapsulating resin at a position farther from a bottom of the encapsulating resin than the outer lead extending from the first side surface of the encapsulating resin in a thickness direction of the semiconductor device.

6. A semiconductor device comprising:

a semiconductor chip mounted on an island;

outer leads disposed along and spaced from opposite sides of the island;

inner leads disposed on an inner side of and directly connected to and continuous with respective outer leads and wire-bonded to the semiconductor chip, the inner leads being positioned at a different height from that of the outer leads by a stepped portion;

inner lead suspension leads directly connected to and continuous with respective inner leads;

an encapsulating resin covering the semiconductor chip, the island, the inner leads, the wires, part of the outer leads, and part of the inner lead suspension leads, wherein outer end portions of the outer leads extend from first side surfaces of the encapsulating resin and are not covered by the encapsulating resin, and outer end portions of the inner lead suspension leads extend from second side surfaces of the encapsulating resin different from the first side surfaces at a same height as that of the inner leads and are not covered by the encapsulating resin, and wherein respective lower surfaces of the outer leads extend from a bottom surface of the encapsulating resin; and

a plated film formed on all surfaces of the outer leads not covered by the encapsulating resin.

7. A semiconductor device according to claim 6 ; further comprising island suspension leads connected to the island and extending from the second side surfaces of the encapsulating resin.

8. A semiconductor device according to claim 6 ; wherein the outer leads are positioned at a height different from that of the inner lead suspension leads in a thickness direction of the semiconductor device.

9. A semiconductor device according to claim 6 ; wherein the first side surfaces comprise two opposed first side surfaces of the encapsulating resin, and the second side surfaces comprise two opposed side surfaces of the encapsulating resin.

10. A semiconductor device according to claim 6 ; wherein each outer lead and a respective one of the inner leads and a respective one of the inner lead suspension leads constitute a one-piece lead structure.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2015
From: TAGUCHI, YASUHIRO
To: SEIKO INSTRUMENTS INC.
Reel/Frame 035111/0201 →