Semiconductor device and electronic device

1. A semiconductor device comprising:

a circuit board;

a first package provided on the circuit board, the first package including a first memory and a first controller configured to control the first memory;

a second package provided on the circuit board, the second package including a second memory and a second controller configured to control the second memory;

an interface unit configured to be connectable to a host device, the interface unit including a first terminal; and

a first signal line through which a control signal is transmitted, the first signal line electrically connecting the first terminal to the first controller and connecting the first terminal to the second controller, wherein,

the first signal line is connected to the first controller and the second controller, and is used in common by the first controller and the second controller, the control signal being transmitted to the first controller and the second controller from the host device via the first terminal and the first signal line.

2. The semiconductor device according to claim 1 , wherein the first controller is configured to control read of data from the first memory and to control write of data into the first memory, and the second controller is configured to control read of data from the second memory and to control write of data into the second memory.

3. The semiconductor device according to claim 1 , wherein

the interface unit includes a second terminal electrically connected to a second signal line, the second signal line being connected to the first controller or the second controller, the second signal line being a line through which a data signal is transmitted.

4. The semiconductor device according to claim 3 , wherein the interface unit includes a third terminal, and an electric status corresponding to a configuration of the semiconductor device is set in the third terminal.

5. The semiconductor device according to claim 4 , wherein the electric status is an impedance status.

6. The semiconductor device according to claim 4 , wherein the electric status is a potential status.

7. The semiconductor device according to claim 6 , wherein the third terminal is set at a ground potential of the semiconductor device, or set at a potential different from the ground potential and a power supply potential of the semiconductor device.

8. The semiconductor device according to claim 1 , wherein the circuit board includes a first face, and

the first package and the second package are provided on the first face.

9. The semiconductor device according to claim 1 , wherein the circuit board includes a first face and a second face, the second face being on a side opposite to the first face, and

the first package is provided on the first face, and the second package is provided on the second face.

10. An electronic device comprising:

a host device; and

a semiconductor device, the semiconductor device including a circuit board, a first package, a second package, an interface unit and a first signal line, the first package being provided on the circuit board, the first package including a first memory and a first controller configured to control the first memory, the second package including a second memory and a second controller configured to control the second memory, the interface unit being configured to be connectable to the host device, the interface unit including a first terminal, the first signal line being a line through which a control signal is transmitted, the first signal line electrically connecting the first terminal to the first controller and connecting the first terminal to the second controller, the first signal line being connected to the first controller and the second controller, the first signal line being used in common by the first controller and the second controller, the control signal being transmitted to the first controller and the second controller from the host device via the first terminal and the first signal line.

11. The electronic device according to claim 10 , wherein

the interface unit conforms to PCI Express standard.

12. The electronic device according to claim 10 , wherein the interface unit includes a second terminal electrically connected to a second signal line, the second signal line being connected to the first controller or the second controller, the second signal line being a line through which a data signal is transmitted.

13. The electronic device according to claim 12 , wherein the interface unit includes a third terminal, and an electric status corresponding to a configuration of the semiconductor device is set in the third terminal.

14. The electronic device according to claim 13 , wherein the host device is configured to detect the electric status set in the third terminal, and discriminate the configuration of the semiconductor device based on the detected electric status.

15. The electronic device according to claim 14 , wherein the host device is configured to construct a RAID using the first package and the second package based on the detected electric status.

16. The electronic device according to claim 15 , wherein the electric status is an impedance status.

17. The electronic device according to claim 15 , wherein the electric status is a potential status.

18. The electronic device according to claim 17 , wherein the third terminal is set at a ground potential of the semiconductor device, or set at a potential different from the ground potential and a power supply potential of the semiconductor device.

19. The electronic device according to claim 10 , wherein the circuit board includes a first face, and

the first package and the second package are provided on the first face.

20. The electronic device according to claim 10 , wherein the circuit board includes a first face and a second face, the second face being on a side opposite to the first face, and

the first package is provided on the first face, and the second package is provided on the second face.