Method and system for programming, calibrating and driving a light emitting device display

1. A system for measuring a time-dependent parameter among multiple columns of pixel circuits in a display array, the system comprising:

a monitor line; and

an extraction block shared between at least two columns of pixel circuits in the display array through the monitor line, each of the pixel circuits including a light emitting device controlled by a driving transistor, the driving transistor being connectable to the monitor line via a switch transistor, the extraction block extracting at least a time-dependent parameter of each of the pixel circuits with use of electrical signals received from the pixel circuits over the monitor line.

2. The system of claim 1 , wherein the extraction block includes a current sense amplifier or a current comparator.

3. The system of claim 1 , wherein the current on the monitor line is compared against a reference current.

4. The system of claim 1 , wherein the time-dependent parameter includes a threshold voltage of the driving transistor.

5. The system of claim 1 , wherein the time-dependent parameter further includes a degradation of the light emitting device.

6. The system of claim 1 , wherein the time-dependent parameter further includes a degradation of the light emitting device.

7. The system of claim 1 , wherein the extraction block is shared among a few columns of pixel circuits in the display array.

8. The system of claim 1 , wherein the extraction by the extraction block of at least the time-dependent parameter is merged with a programming cycle in which programming information is transferred to each of the pixel circuits.

9. The system of claim 1 , further comprising a calibration scheduler and memory block configured to enable a normal operation mode or a calibration mode for a selected one of the at least two columns.

10. The system of claim 1 , wherein during the calibration mode, the pixel circuits are calibrated based on at least one of their aging or their usage during the normal operation mode of the display array.

11. The system of claim 1 , wherein the pixel circuits are calibrated in real time by the calibration scheduler and memory block.

12. The system of claim 1 , wherein programming data associated with each of the pixel circuits is calibrated by the calibration scheduler and memory block with corresponding information extracted by the extraction block.

13. The system of claim 1 wherein the calibration scheduler and memory block is shared between the at least two columns, and each of the pixel circuits is calibrated one at a time.

14. The system of claim 1 , wherein the calibration scheduler and memory block includes a calibration memory that stores at least the time-dependent parameter extracted by the extraction block for each of the pixel circuits.

15. The system of claim 1 , wherein each of the pixel circuits is a current-mode pixel circuit.

16. The system of claim 1 , wherein each of the pixel circuits is current-programmed.

17. The system of claim 1 , wherein during the extraction of at least the time-dependent parameter, a first current or voltage is applied to the monitor line, and wherein during a programming cycle, a second current or voltage different from the first current or voltage is applied to the monitor line to transfer programming information related to the second current or voltage to each of the pixel circuits.