IP Library Granted Patent US 9,287,874
Granted Patent B2
US 9,287,874 · App. 14/655,353 · Granted Mar 15, 2016

Level-shifting device

Inventors: Pierangelo Confalonieri (Monza e Brianza, IT); Federico Guanziroli (Monza e Brianza, IT)
Assignee: ST-ERICSSON SA
H03K19/018521H03K19/0013
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Quick Facts
Patent No.
US 9,287,874
App. No.
14/655,353
Granted
Mar 15, 2016
Kind
B2
Abstract

A voltage level shifting device for driving a capacitive load has an input terminal for receiving a first input signal switchable between a first logic state corresponding to a first reference voltage and a second logic state corresponding to a second reference voltage, and an output terminal for supplying an output signal switchable between a first logic state corresponding to a third reference voltage and a second logic state corresponding to a fourth reference voltage. The device also has a first electronic circuit that is activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage. The device further has a second electronic circuit that is activated following a commutation of the first input signal from the second reference voltage to the first reference voltage.

Claims (58)

1. A voltage level shifting device for driving a capacitive load, the voltage level shifting device comprising:

a first line set at a first reference voltage;

a second line set at a second reference voltage greater than the first reference voltage;

a third line set at a third reference voltage greater than the second reference voltage;

an input terminal for receiving a first input signal switchable between a first input logic state corresponding to said first reference voltage and a second input logic state corresponding to said second reference voltage;

an output terminal for supplying an output signal switchable between a first output logic state corresponding to said third reference voltage and a second output logic state corresponding to a fourth reference voltage obtained by reducing said third reference voltage by predetermined operative voltage;

a first electronic circuit having an input connected to the input terminal and an output connected to the output terminal, said first electronic circuit being activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage;

a second electronic circuit having a first input connected to the input terminal to receive the first input signal and a first output connected to the output terminal, said second electronic circuit being activated following a commutation of the first input signal from the second reference voltage to the first reference voltage, the second electronic circuit including:

a circuital block connected between the third line and the first output, said circuital block being activated through a first input node for commutating the output terminal from the fourth reference voltage to the third reference voltage following said commutation of the first input signal from the second reference voltage to the first reference voltage, and

a network operatively connected between the third line and the first input, configured to drive said first input node to maintain said circuital block activated at least for a first time interval greater than a second time interval requested to commutate said output terminal from the fourth reference voltage to the third reference voltage.

2. The voltage level shifting device according to claim 1 , wherein said circuital block comprises a first PMOS transistor connected between the third line and the first output and having a gate terminal connected to said first input node.

3. The voltage level shifting device according to claim 1 , wherein said network of the second electronic circuit comprises:

a first resistor connected between the third line and said first input node, and

a first capacitor connected between the same first input node and said first input.

4. The voltage level shifting device according to claim 1 , wherein said network of the second electronic circuit comprises:

a first capacitor connected between the first input node and said first input;

a second PMOS transistor connected between the third line and said first input node and having a gate terminal connected to a second input node;

a second resistor connected between the third line and the second input node;

a second capacitor connected between said second input node and a first input terminal of the device configured to receive a second input signal switchable between the first reference voltage and the second reference voltage so that the second input signal is logically opposite to said first input signal.

5. The voltage level shifting device according to claim 1 , wherein said first electronic circuit comprises an input circuit and a source follower PMOS transistor connected to the input circuit to form a branch between the output and the first line.

6. The voltage level shifting device according to claim 5 , wherein said source follower PMOS transistor has a source terminal connected to the output and a drain terminal connected to an output node of the input circuit, a gate terminal of the source follower PMOS transistor being driven by a bias voltage.

7. The voltage level shifting device according to claim 6 , wherein said input circuit comprises a first and a second NMOS transistor connected together in a cascode configuration, said first NMOS transistor being activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the source terminal of the source follower PMOS transistor to the fourth reference voltage.

8. The voltage level shifting device according to claim 6 , further comprising a bias circuit configured to generate said bias voltage and connected between the third line and the first line, said bias circuit including:

a current mirror circuit having an output connected to said output terminal to supply said output terminal with a mirrored current generated by a current generator;

a first branch connected between the first line and an input of said current mirror circuit, said first branch including a third resistor series connected to said current generator.

9. The voltage level shifting device according to claim 8 , wherein said third resistor is connected between the input of the current mirror circuit and an intermediate node of the first branch so that the bias circuit provides said bias voltage on said intermediate node connected to the gate terminal of the source follower PMOS transistor.

10. A voltage level shifting device according to claim 9 , wherein said bias circuit comprises a third capacitor connected between the third line and said intermediate node.

11. The voltage level shifting device according to claim 9 , wherein said bias circuit further comprises a fourth capacitor connected between the third line and the input of the current mirror circuit.

12. The voltage level shifting device according to claim 8 , wherein said bias voltage is obtained by subtracting from said third reference voltage both a voltage threshold of a PMOS transistor and a voltage drop produced on said third resistor, according to:

VGSOUF=VDD 2− V TH −R 1 I 1

in which I 1 represents a bias current generated by the current generator.

13. The voltage level shifting device according to claim 12 , wherein the second logic state of the output signal corresponding to said fourth reference voltage is obtained as based on:

VGSOUF+V TH =VDD 2− R 1 I 1= VDD 2− K

in which:

VGSOUF is said bias voltage;

VDD 2 is said third reference voltage;

V TH is a voltage threshold of a PMOS transistor; and

R 1 I 1 =K is a voltage drop on the third resistor corresponding to the predetermined operative voltage.

14. An amplification device comprising a voltage level shifting device including:

a first line set at a first reference voltage;

a second line set at a second reference voltage greater than the first reference voltage;

a third line set at a third reference voltage greater than the second reference voltage;

an input terminal for receiving a first input signal switchable between a first input logic state corresponding to said first reference voltage and a second input logic state corresponding to said second reference voltage;

an output terminal for supplying an output signal switchable between a first output logic state corresponding to said third reference voltage and a second output logic state corresponding to a fourth reference voltage obtained by reducing said third reference voltage by a predetermined operative voltage;

a first electronic circuit having an input connected to the input terminal and an output connected to the output terminal, said first electronic circuit being activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage;

a second electronic circuit having a first input connected to the input terminal to receive the first input signal and a first output connected to the output terminal, said second electronic circuit being activated following a commutation of the first input signal from the second reference voltage to the first reference voltage, the second electronic circuit including:

a circuital block connected between the third line and the first output, said circuital block being activated through a first input node for commutating the output terminal from the fourth reference voltage to the third reference voltage following said commutation of the first input signal from the second reference voltage to the first reference voltage, and

a network operatively connected between the third line and the first input, configured to drive said first input node to maintain said circuital block activated at least for a first time interval greater than a second time interval requested to commutate said output terminal from the fourth reference voltage to the third reference voltage.

15. A portable electronic equipment comprising the amplification device having a voltage level shifting device including:

a first line set at a first reference voltage;

a second line set at a second reference voltage greater than the first reference voltage;

a third line set at a third reference voltage greater than the second reference voltage;

an input terminal for receiving a first input signal switchable between a first input logic state corresponding to said first reference voltage and a second input logic state corresponding to said second reference voltage;

an output terminal for supplying an output signal switchable between a first output logic state corresponding to said third reference voltage and a second output logic state corresponding to a fourth reference voltage obtained by reducing said third reference voltage by a predetermined operative voltage;

a first electronic circuit having an input connected to the input terminal and an output connected to the output terminal, said first electronic circuit being activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage;

a second electronic circuit having a first input connected to the input terminal to receive the first input signal and a first output connected to the output terminal, said second electronic circuit being activated following a commutation of the first input signal from the second reference voltage to the first reference voltage, the second electronic circuit including:

a circuital block connected between the third line and the first output, said circuital block being activated through a first input node for commutating the output terminal from the fourth reference voltage to the third reference voltage following said commutation of the first input signal from the second reference voltage to the first reference voltage, and

a network operatively connected between the third line and the first input, configured to drive said first input node to maintain said circuital block activated at least for a first time interval greater than a second time interval requested to commutate said output terminal from the fourth reference voltage to the third reference voltage.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2019
From: OPTIS CIRCUIT TECHNOLOGY, LLC,
To: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
Reel/Frame 048529/0510 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2019
From: ST-ERICSSON SA, EN LIQUIDATION
To: OPTIS CIRCUIT TECHNOLOGY, LLC,
Reel/Frame 048504/0519 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2015
From: GUANZIROLI, FEDERICO; CONFALONIERI, PIERANGELO
To: ST-ERICSSON SA
Reel/Frame 035965/0588 →
Priority Claims (1)
EP 13152777 · Jan 25, 2013 · regional
Continuity (2)
Provisional Application 61760372 · Feb 4, 2013
Related Publication 20150372680A1 · Dec 24, 2015