IP Library Granted Patent US 9,893,116
Granted Patent B2
US 9,893,116 · App. 14/657,272 · Granted Feb 13, 2018

Manufacturing method of electronic device and manufacturing method of semiconductor device

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Quick Facts
Patent No.
US 9,893,116
App. No.
14/657,272
Granted
Feb 13, 2018
Kind
B2
Abstract

A manufacturing method of an electronic device processes a surface of a first wafer, bonds a surface of a second wafer to the processed surface of the first wafer, thins the first wafer by polishing a back surface of the first wafer, the back surface being located on an opposite side of the processed surface, forms a groove along a periphery of the back surface of the thinned first wafer by using a dicing blade, attaches a protective layer to the back surface of the first wafer having the groove, via a bonding layer, and polishes a back surface of the second wafer, the back surface being located on an opposite side of the surface attached to the protective layer.

Claims (44)

1. A manufacturing method of an electronic device, comprising:

processing a surface of a first wafer;

forming a wiring layer on the surface of the first wafer via a first bonding layer;

bonding a surface of a second wafer to the processed surface of the first wafer;

thinning the first wafer by polishing a back surface of the first wafer, the back surface being located on an opposite side of the processed surface;

forming a groove along a periphery of the back surface of the thinned first wafer by using a dicing blade, so that at least a part of the first bonding layer remains on an outer circumference side of the groove, the groove having a bottom surface, a first side surface and a second side surface, the bottom surface being between the first side surface and the second side surface;

attaching a protective layer to the back surface of the first wafer having the groove, via a second bonding layer; and

polishing a back surface of the second wafer, the back surface being located on an opposite side of the surface attached to the protective layer.

2. The manufacturing method of claim 1 ,

wherein

the groove is formed deeper than a bottom surface of the wiring layer.

3. The manufacturing method of claim 1 ,

wherein the depth of the groove is equal to or smaller than a thickness obtained by subtracting 20 μm from a combined thickness of the first wafer and the second wafer after polishing the back surface of the second wafer.

4. The manufacturing method of claim 1 ,

wherein the groove has a width of 0.1 to 1.0 mm.

5. The manufacturing method of claim 1 ,

wherein when forming the groove, a tapered initial groove is formed first, and then the groove having a predetermined width and a predetermined depth is formed nearly at the center of the initial groove.

6. The manufacturing method of claim 1 ,

wherein when forming the groove, the groove is formed so that the height of the first wafer in an outer radial direction from the groove is lower than the height of the first wafer in an inner radial direction from the groove.

7. The manufacturing method of claim 1 ,

wherein when forming the groove, the groove is formed so that the height of the first wafer in an outer radial direction from the groove is identical to the height of the first wafer in an inner radial direction from the groove.

8. The manufacturing method of claim 1 ,

wherein the processing of the surface of the first wafer is performed to form: a photoelectric conversion element; a transfer circuit to transfer an electrical signal obtained through photoelectric conversion by using the photoelectric conversion element; an A/D converter to convert the transferred electrical signal into a digital signal; and an output circuit to output the digital signal.

9. A manufacturing method of a semiconductor device, comprising:

processing a surface of a first wafer to form a photoelectric conversion element, a transfer circuit to transfer an electrical signal obtained through photoelectric conversion by using the photoelectric conversion element, an A/D converter to convert the transferred electrical signal into a digital signal, and an output circuit to output the digital signal on the first wafer;

forming a wiring layer on the surface of the first wafer via a first bonding layer;

bonding a surface of a second wafer to the processed surface of the first wafer;

thinning the first wafer by polishing a back surface of the first wafer, the back surface being located on an opposite side of the processed surface;

forming a groove along a periphery of the back surface of the thinned first wafer by using a dicing blade, so that at least a part of the first bonding layer remains on an outer circumference side of the groove, the groove having a bottom surface, a first side surface and a second side surface, the bottom surface being between the first side surface and the second side surface;

attaching a protective layer to the back surface of the first wafer having the groove, via a second bonding layer; and

polishing a back surface of the second wafer, the back surface being located on an opposite side of the surface attached to the protective layer.

10. The manufacturing method of claim 9 ,

wherein

the groove is formed deeper than a bottom surface of the wiring layer.

11. The manufacturing method of claim 9 ,

wherein the depth of the groove is equal to or smaller than a thickness obtained by subtracting 20 μm from a combined thickness of the first wafer and the second wafer after polishing the back surface of the second wafer.

12. The manufacturing method of claim 9 ,

wherein the groove has a width of 0.1 to 1.0 mm.

13. The manufacturing method of claim 9 ,

wherein when forming the groove, a tapered initial groove is formed first, and then the groove having a predetermined width and a predetermined depth is formed nearly at the center of the initial groove.

14. The manufacturing method of claim 9 ,

wherein when forming the groove, the groove is formed so that the height of the first wafer in an outer radial direction from the groove is lower than the height of the first wafer in an inner radial direction from the groove.

15. The manufacturing method of claim 9 ,

wherein when forming the groove, the groove is formed so that the height of the first wafer in an outer radial direction from the groove is identical to the height of the first wafer in an inner radial direction from the groove.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043052/0218 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2015
From: TAKYU, SHINYA; NUMATA, HIDEO; OKURA, HIROYUKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035867/0427 →