Resistor calibration using a MOS capacitor

1. A method for calibrating a resistance value, comprising:

measuring a value of a reference capacitor; and

adjusting a first variable resistor based on the measured value of the reference capacitor;

directing a constant current through the reference capacitor during a reference time interval;

after the reference time interval, directing the constant current through the first variable resistor; and

varying the first variable resistor value progressively by varying a control signal until a voltage of the first variable resistor reaches a voltage of the reference capacitor.

2. The method of claim 1 , comprising:

providing a second variable resistor having a structure matching the structure of the first variable resistor; and

setting the second variable resistor through the control signal.

3. The method of claim 1 , wherein the variable resistor is adjustable stepwise through a digital control signal, and the method comprises progressively incrementing or decrementing the digital control signal.

4. The method of claim 1 , comprising fabricating the reference capacitor as a MOS capacitor.

5. The method of claim 1 , comprising resetting the reference capacitor before the reference time interval.

6. A circuit for calibrating a resistance value, comprising:

a reference capacitor;

a first variable resistor; and

control circuitry configured to measure a value of the reference capacitor and adjust the first variable resistor based on the measured value of the reference capacitor, wherein the control circuitry includes:

a constant current source configured to produce a constant current;

a switch configured to connect the constant current source across the reference capacitor in a first position and to direct the constant current through the first variable resistor in a second position; and

a control circuit configured to:

set the switch in the first position during a reference time interval,

set the switch in the second position, and

control the first variable resistor through a progressively varying control signal until a voltage of the first variable resistor reaches a voltage of the reference capacitor.

7. The circuit of claim 6 , comprising:

a second variable resistor having a structure matching a structure of the first variable resistor, the second variable resistor being configured to be set by the control signal.

8. The circuit of claim 6 , wherein the control signal is digital and the variable resistor comprises:

a plurality of fixed resistors connected in series, having values in geometric progression; and

a plurality of switches respectively connected in parallel with the fixed resistors, the control circuit being configured to control each switch by a respective bit of the control signal.

9. The circuit of claim 6 , wherein the control signal is digital and the variable resistor comprises:

a first fixed resistor;

a plurality of second fixed resistors having values in geometric progression; and

a plurality of switches respectively connected in series with the second fixed resistors, each switch being configured to selectively connect a corresponding one of the second fixed resistors in parallel with the first fixed resistor, the control circuit being configured to control each switch by a respective bit of the control signal.

10. The circuit of claim 6 , wherein the reference capacitor is a MOS capacitor in the form of a P-MOS transistor.

11. The circuit of claim 6 , wherein the control circuit is configured to reset the reference capacitor before the reference time interval.

12. A circuit for calibrating a resistance value, comprising:

a reference capacitor;

a first variable resistor; and

control circuitry configured to measure a value of the reference capacitor and adjust the first variable resistor based on the measured value of the reference capacitor, wherein the control circuitry includes:

a current source coupled to the first variable resistor configured to produce a current through the first variable resistor;

a voltage comparator configured to compare a voltage of the reference capacitor with a voltage across the first variable resistor and to output a calibration signal indicating that the voltage across the first variable resistor has reached the voltage across the reference capacitor; and

a control circuit coupled to the voltage comparator and the first variable resistor and configured to increase a resistance value of the first variable resistor until the calibration signal indicates that the voltage across the first variable resistor has reached the voltage across the reference capacitor.

13. The circuit of claim 12 , wherein the reference capacitor is a P-MOS transistor having source and drain terminals connected to each other and to a voltage source terminal and a gate terminal electrically coupled to an input of the voltage comparator.

14. A calibration circuit for calibrating a resistance value, comprising:

a reference capacitor;

a voltage detector coupled to the reference capacitor and configured to detect a voltage of the reference capacitor;

a first variable resistor; and

a control circuit coupled to the voltage detector and configured to adjust a resistance value of the first variable resistor based on the voltage of the reference capacitor detected by the voltage detector, wherein:

the voltage detector includes a voltage comparator configured to compare a voltage across the reference comparator with a voltage across the first variable resistor and to output a calibration signal indicating that the voltage across the first variable resistor has reached the voltage across the reference capacitor; and

the control circuit is coupled to the voltage comparator and the first variable resistor and is configured to increase a resistance value of the first variable resistor until the calibration signal indicates that the voltage across the first variable resistor has reached the voltage across the reference capacitor.

15. The calibration circuit of claim 14 , further comprising:

a constant current source configured to produce a constant current; and

a switch configured to connect the constant current source across the reference capacitor in a first position and to direct the constant current through the first variable resistor in a second position, wherein the control circuit is configured to:

set the switch in the first position during a reference time interval,

set the switch in the second position, and

while the switch is in the second position, control the first variable resistor through a progressively varying control signal until the voltage of the first variable resistor reaches the voltage of the reference capacitor; and

set the switch back to the first position in response to the calibration signal indicating that the voltage across the first variable resistor has reached the voltage across the reference capacitor.

16. The calibration circuit of claim 15 , further comprising a reset transistor coupled to the reference capacitor, wherein the control circuit is configured to cause the reset transistor to discharge the reference capacitor before the reference time interval.

17. A calibration circuit for calibrating a resistance value, comprising:

a reference capacitor;

a voltage detector coupled to the reference capacitor and configured to detect a voltage of the reference capacitor;

a first variable resistor;

a control circuit coupled to the voltage detector and configured to adjust a resistance value of the first variable resistor based on the voltage of the reference capacitor detected by the voltage detector, wherein the control circuit is configured to control the first variable resistor through a progressively varying control signal until the voltage of the first variable resistor reaches the voltage of the reference capacitor; and

a second variable resistor having a structure matching a structure of the first variable resistor, the second variable resistor being configured to be set by the control signal.

18. The calibration circuit of claim 17 , wherein the reference capacitor is a P-MOS transistor having source and drain terminals connected to each other and to a voltage source terminal and a gate terminal electrically coupled to an input of the voltage detector.

19. A calibration for calibrating a resistance value, comprising:

a reference capacitor;

a voltage detector coupled to the reference capacitor and configured to detect a voltage of the reference capacitor;

a first variable resistor; and

a control circuit coupled to the voltage detector and configured to adjust a resistance value of the first variable resistor based on the voltage of the reference capacitor detected by the voltage detector, wherein the control signal is digital and the variable resistor comprises:

a plurality of fixed resistors connected in series, having values in geometric progression; and

a plurality of switches respectively connected in parallel with the fixed resistors, the control circuit being configured to control each switch by a respective bit of the control signal.

20. The calibration circuit of claim 19 , wherein the reference capacitor is a P-MOS transistor having source and drain terminals connected to each other and to a voltage source terminal and a gate terminal electrically coupled to an input of the voltage detector.

21. A calibration circuit for calibrating a resistance value, comprising:

a reference capacitor;

a voltage detector coupled to the reference capacitor and configured to detect a voltage of the reference capacitor;

a first variable resistor; and

a control circuit coupled to the voltage detector and configured to adjust a resistance value of the first variable resistor based on the voltage of the reference capacitor detected by the voltage detector, wherein the reference capacitor is a P-MOS transistor having source and drain terminals connected to each other and to a voltage source terminal and a gate terminal electrically coupled to an input of the voltage detector.

22. The calibration circuit of claim 21 , further comprising a reset transistor coupled to the reference capacitor, wherein the control circuit is configured to cause the reset transistor to discharge the reference capacitor before the reference time interval.