IP Library Granted Patent US 9,530,814
Granted Patent B2
US 9,530,814 · App. 14/663,813 · Granted Dec 27, 2016

Method and apparatus for reducing crosstalk in CMOS image sensor

Inventors: Wenjie Peng (Shanghai, CN); Minwei Xi (Shanghai, CN)
Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
H01L27/1464H01L21/76224H01L27/1463H01L27/14643H01L27/14683H01L27/14689
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Quick Facts
Patent No.
US 9,530,814
App. No.
14/663,813
Granted
Dec 27, 2016
Kind
B2
Abstract

A CMOS image sensor and a method of manufacturing the same are provided. The CMOS image sensor includes a semiconductor substrate having a front side and a back side, at least two pixels disposed in the first side, a shallow trench isolation disposed in the front side between the at least two pixels, and a crosstalk reduction element disposed in the back side at a location above the shallow trench isolation. The crosstalk reduction element reduces optical and electrical crosstalk and improves the image quality of the CMOS image sensor.

Claims (23)

1. A CMOS image sensor comprising:

a semiconductor substrate having a front side and a back side;

at least two pixels disposed in the front side;

a shallow trench isolation disposed in the front side between the at least two pixels; and

a crosstalk reduction element disposed in the back side at a location above the shallow trench isolation and between the at least two pixels,

wherein the crosstalk reduction element is a deep trench filled with a dielectric layer comprising tetraethyl orthosilicate and a cavity.

2. The CMOS image sensor of claim 1 , wherein the crosstalk reduction element comprises:

a first interface between the semiconductor substrate and the deep trench isolation, the first interface comprising a first total internal reflection angle of about 26 degrees; and

a second interface between the dielectric layer and the cavity, the second interface comprising a second total internal reflection angle of about 17 degrees.

3. The CMOS image sensor of claim 1 , wherein the crosstalk reduction element comprises:

a bottom portion in contact with a top portion of the shallow trench isolation; and

a top portion having a surface coplanar with a back side surface of the semiconductor device.

4. The CMOS image sensor of claim 1 , wherein the crosstalk reduction element has a depth in a range between 1.5 um and 4 um and a width equal to or less than 0.25 um.

5. The CMOS image sensor of claim 1 , wherein the at least two pixels each comprise a photodiode.

6. The CMOS image sensor of claim 5 , wherein the photodiode comprises an n+ layer.

7. The CMOS image sensor of claim 1 , wherein the cavity is a near vacuum structure.

8. The CMOS image sensor of claim 1 , wherein the cavity comprises a plurality of voids separated from each other.

9. An electronic device comprising a CMOS image sensor, the image sensor comprising:

a semiconductor substrate having a front side and a back side;

at least two pixels disposed in the first side;

a shallow trench isolation disposed in the first side between the at least two pixels; and

a crosstalk reduction element disposed in the second side at a location above the shallow trench isolation and between the at least two pixels,

wherein the crosstalk reduction element is a deep trench filled with a dielectric layer comprising tetraethyl orthosilicate and a cavity.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2015
From: PENG, WENJIE; XI, MINWEI
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 035219/0161 →
Priority Claims (1)
CN 2014 1 0184909 · May 4, 2014 · national
Continuity (1)
Related Publication 20150318319A1 · Nov 5, 2015