Voltage regulator

1. A voltage regulator comprising an output transistor comprised of an NMOS transistor having a backgate grounded, and an error amplifier circuit having a first amplification stage inputted with a divided voltage obtained by dividing an output voltage outputted from the output transistor and a reference voltage, a second amplification stage configured to control the output transistor, and a first transistor of the second amplification stage configured to allow a separately supplied bias current to flow at an input of the first transistor and a drain of the first transistor subsequently bias a gate of the output transistor, said voltage regulator comprising:

a constant voltage circuit;

a second transistor having a gate inputted with a voltage of the constant voltage circuit and a source connected to a source of the output transistor; and

a current mirror circuit having an input connected to a drain of the second transistor, and an output connected to a gate of the first transistor.

2. The voltage regulator according to claim 1 , further including:

a third transistor of the current mirror circuit having a gate connected to the drain of the second transistor, and

a constant current circuit connected to a drain of the third transistor,

wherein a phase compensation circuit of the error amplifier circuit is adjusted by a voltage at a connecting point of the drain of the third transistor and the constant current circuit.