Half bridge power conversion circuits using GaN devices
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
1. A half bridge circuit comprising:
a GaN-based low side circuit disposed on a first monolithic die, and including:
a GaN-based low side switch having a low side switch control gate, a low side switch source and a low side switch drain, wherein the low side switch source is connected to a ground and the low side switch drain is connected to a switch node;
a GaN-based low side switch driver having an output connected to the low side switch control gate; and
a GaN-based level shift circuit having an input and an output; and
a GaN-based high side circuit disposed on a second monolithic die, and including:
a GaN-based high side switch having a high side control gate, a high side switch source and a high side switch drain, wherein the high side switch source is connected to the switch node and the high side switch drain is connected to a voltage source; and
a GaN-based high side switch driver having an output connected to the high side switch control gate and an input connected to the output of the GaN-based level shift circuit;
wherein the GaN-based level shift circuit is configured to send a level shift signal from the first monolithic die to the second monolithic die.
2. The half bridge circuit of claim 1 further comprising a low side control circuit coupled to the high side and the low side switch drivers.
3. The half bridge circuit of claim 2 wherein the low side control circuit is disposed on the second monolithic die and further comprises the level shift circuit.
4. The half bridge circuit of claim 3 wherein the GaN-based high side switch driver includes a level shift receiver coupled to the level shift circuit, and the level shift receiver includes a signal modulator that is coupled to the high side switch driver.
5. The half bridge circuit of claim 3 wherein the level shift circuit includes an inverter having a resistor pull up and a pull down transistor.
6. The half bridge circuit of claim 1 further comprising one or more pulse generators.
7. The half bridge circuit of claim 1 wherein at least one of the GaN-based low side switch driver and the GaN-based high side switch driver have at least one delay circuit.
8. The half bridge circuit of claim 1 wherein the GaN-based low side circuit includes a startup circuit.
9. The half bridge circuit of claim 1 further comprising a shoot through protection circuit configured to prevent simultaneous conduction of the GaN-based high side and low side switches.
10. The half bridge circuit of claim 1 wherein the GaN-based high side circuit includes a high side controller coupled to the GaN-based high side switch driver; and
the GaN-based low side circuit includes a low side controller coupled to the GaN-based low side switch driver and the high side controller.
11. The half bridge circuit of claim 1 wherein at least one of the GaN-based low side circuit and the GaN-based high side circuit have an ESD clamp circuit.