Current generation circuit, and bandgap reference circuit and semiconductor device including the same
A current generation circuit including a first and a second bipolar transistors, a current distribution circuit that makes a first current and a second current flow through the first and second bipolar transistors, respectively, the first current and the second current corresponding to a first control voltage, a first NMOS transistor disposed between the first bipolar transistor and the first current distribution circuit, a second NMOS transistor disposed between the second bipolar transistor and the first current distribution circuit, a first resistive element, a first operational amplifier that outputs the second control voltage to the gates of the first and the second NMOS transistors according to a drain voltage of the first NMOS transistor and a reference bias voltage, and a second operational amplifier that generates the first control voltage according to a drain voltage of the second NMOS transistor and the reference bias voltage.
1. A bandgap reference circuit comprising:
a first bipolar transistor, a base and a collector of the first bipolar transistor being connected to each other;
a second bipolar transistor, a base and a collector of the second bipolar transistor being connected to each other;
a third bipolar transistor having the same conductivity type as that of the first and second bipolar transistors, a base and a collector of the third bipolar transistor being connected to each other;
a first current distribution circuit that makes a first current and a second current flow between the collectors and emitters of the first and second bipolar transistors, respectively, the first current corresponding to a first control voltage, the second current being in proportion to the first current;
a first NMOS transistor disposed between the first bipolar transistor and the first current distribution circuit, a gate of the first NMOS transistor being supplied with a second control voltage;
a second NMOS transistor disposed between the second bipolar transistor and the first current distribution circuit, a gate of the second NMOS transistor being supplied with the second control voltage;
a first resistive element disposed between the second NMOS transistor and the second bipolar transistor;
a second resistive element disposed between the third bipolar transistor and the first current distribution circuit;
a third resistive element disposed in parallel with the second resistive element and the third bipolar transistor;
a first operational amplifier that generates the second control voltage according to a drain voltage of the first NMOS transistor and a reference bias voltage; and
a second operational amplifier that generates the first control voltage according to a drain voltage of the second NMOS transistor and the reference bias voltage,
wherein the first current distribution circuit further makes a third current, in proportion to the first and second currents, flow between the collector and an emitter of the third bipolar transistor,
wherein the bandgap reference circuit outputs a voltage at a node on a current path extending from the first current distribution circuit to the second resistive element.
2. The bandgap reference circuit according to claim 1 , wherein the first and second bipolar transistors are both PNP bipolar transistors.
3. The bandgap reference circuit according to claim 1 , wherein the first and second NMOS transistors are both depletion or native MOS transistors.
4. The bandgag reference circuit according to claim 1 , further comprising:
a first supplementary resistive element disposed between the collector and the emitter of the first bipolar transistor; and
a second supplementary resistive element disposed between the collector and the emitter of the second bipolar transistor.
5. The bandgag reference circuit according to claim 4 ,
wherein the first current distribution circuit further makes a third current in proportion to the first and second currents that flow through the second resistive element,
wherein the bandgap reference circuit outputs a voltage at a node on a current path extending from the first current distribution circuit to the second resistive element.
6. The bandgap reference circuit according to claim 1 , wherein the second resistive element has a fixed resistor.
7. A semiconductor device comprising:
the bandgap reference circuit according to claim 1 ; and
a reference voltage current generation section that outputs at least one of a reference voltage and a reference current based on the voltage output from the bandgap reference circuit.
8. The bandgap reference circuit according to claim 1 , wherein the second resistive element is a variable resistor.
9. The bandgap reference circuit according to claim 8 , wherein the variable resistor sets a resistance value between an output terminal of the bandgap reference circuit and the third bipolar transistor according to a first control signal, and set a resistance value between the first current distribution circuit and the third bipolar transistor according to a second control signal.
10. A bandgap reference circuit comprising:
a first bipolar transistor, a base and a collector of the first bipolar transistor being connected to each other;
a second bipolar transistor, a base and a collector of the second bipolar transistor being connected to each other;
a first current distribution circuit that makes a first current and a second current flow between the collectors and emitters of the first and second bipolar transistors, respectively, the first current corresponding to a first control voltage, the second current being in proportion to the first current;
a first NMOS transistor disposed between the first bipolar transistor and the first current distribution circuit, a gate of the first NMOS transistor being supplied with a second control voltage;
a second NMOS transistor disposed between the second bipolar transistor and the first current distribution circuit, a gate of the second NMOS transistor being supplied with the second control voltage;
a first resistive element disposed between the second NMOS transistor and the second bipolar transistor;
a first operational amplifier that generates the second control voltage according to a drain voltage of the first NMOS transistor and a reference bias voltage; and
a second operational amplifier that generates the first control voltage according to a drain voltage of the second NMOS transistor and the reference bias voltage
a second resistive element coupled with the current generation circuit, and where the first current distribution circuit further makes a third current, in proportion to the first and second currents, flow through the second resistive element;
a third resistive element connected in parallel with the second resistive element;
a second current distribution circuit that makes a fourth current flow through the third resistive element and further makes a fifth current, in proportion to the fourth current, flow through the second resistive element through which the third current also flows; and
a third NMOS transistor disposed between the third resistive element and the second current distribution circuit, a gate of the third NMOS transistor being supplied with the second voltage,
wherein the bandgap reference circuit outputs a voltage according to a resistance value of the second resistive element and a value of a current flowing through the second resistive element.