IP Library Granted Patent US 9,537,455
Granted Patent B2
US 9,537,455 · App. 14/683,960 · Granted Jan 3, 2017

Multiplex detector signal boosters

Inventor: Christopher Ken Ashworth (St. George, UT)
Assignee: Wilson Electronics, LLC
H03F3/211H03F3/19H04B1/40H03F2200/451H03F2203/21109
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Quick Facts
Patent No.
US 9,537,455
App. No.
14/683,960
Granted
Jan 3, 2017
Kind
B2
Abstract

A signal booster may include a first path that may include a first tap circuit. The first path may be coupled between a first port and a second port and may be configured to amplify a first signal. The signal booster may also include a second path that includes a second tap circuit. The second path may be coupled between the first port and the second port and may be configured to amplify a second signal. The signal booster may also include a radio frequency detector circuit and a switch circuit. The switch circuit may be configured to switch between coupling the radio frequency detector circuit to the first tap circuit and coupling the radio frequency detector circuit to the second tap circuit to provide either a portion of the first signal or a portion of the second signal to the radio frequency detector circuit.

Claims (50)

1. A signal booster, comprising:

a first port;

a second port;

a first uplink amplification path that includes a first uplink tap circuit, the first uplink amplification path coupled between the first port and the second port and configured to pass a first uplink signal of a first frequency in a wireless communication network;

a second uplink amplification path that includes a second uplink tap circuit, the second uplink amplification path coupled between the first port and the second port and configured to pass a second uplink signal of a second frequency in the wireless communication network;

an uplink radio frequency detector circuit;

an uplink switch circuit coupled to the first uplink tap circuit, to the second uplink tap circuit, and the uplink radio frequency detector circuit, the uplink switch circuit configured to switch between coupling the uplink radio frequency detector circuit to the first uplink tap circuit and coupling the uplink radio frequency detector circuit to the second uplink tap circuit to provide either a portion of the first uplink signal or a portion of the second uplink signal to the uplink radio frequency detector circuit;

a first downlink amplification path that includes a first downlink tap circuit, the first downlink amplification path coupled between the first port and the second port and configured to pass a first downlink signal of a third frequency in the wireless communication network;

a second downlink amplification path that includes a second downlink tap circuit, the second downlink amplification path coupled between the first port and the second port and configured to pass a second downlink signal of a fourth frequency in the wireless communication network;

a downlink radio frequency detector circuit; and

a downlink switch circuit coupled to the first downlink tap circuit, to the second downlink tap circuit, and to the downlink radio frequency detector circuit, the downlink switch circuit configured to switch between coupling the downlink radio frequency detector circuit to the first downlink tap circuit and coupling the downlink radio frequency detector circuit to the second downlink tap circuit to provide either a portion of the first downlink signal or a portion of the second downlink signal to the downlink radio frequency detector circuit.

2. The signal booster of claim 1 , wherein each of the first uplink tap circuit, the second uplink tap circuit, the first downlink tap circuit, and the second downlink tap circuit include one or more of a resistor, a splitter, a capacitor, and a directional coupler.

3. The signal booster of claim 1 , wherein the uplink radio frequency detector circuit and the downlink radio frequency detector circuit each include one or more of a diode and a log detector.

4. The signal booster of claim 1 , further comprising a control unit coupled to the uplink switch circuit, the downlink switch circuit, the uplink radio frequency detector circuit, and the downlink radio frequency detector circuit, wherein the control unit is configured to control the uplink switch circuit and the downlink switch circuit, to receive a uplink output from the uplink radio frequency detector circuit, and to receive a downlink output from the downlink radio frequency detector circuit.

5. The signal booster of claim 4 , wherein the control unit is configured to:

adjust a first uplink amplification applied to the first uplink signal in the first uplink amplification path and a second uplink amplification applied to the second uplink signal in the second uplink amplification path based on the uplink output from the uplink radio frequency detector circuit, and

adjust a first downlink amplification applied to the first downlink signal in the first downlink amplification path and a second downlink amplification applied to the second downlink signal in the second downlink amplification path based on the downlink output from the downlink radio frequency detector circuit.

6. A signal booster, comprising:

a first port;

a second port;

a first amplification path that includes a first tap circuit, the first amplification path coupled between the first port and the second port and configured to amplify a first signal in a wireless communication network;

a second amplification path that includes a second tap circuit, the second amplification path coupled between the first port and the second port and configured to amplify a second signal in the wireless communication network;

a radio frequency detector circuit; and

a switch circuit coupled to the first tap circuit, to the second tap circuit, and to the radio frequency detector circuit, the switch circuit configured to switch between coupling the radio frequency detector circuit to the first tap circuit and coupling the radio frequency detector circuit to the second tap circuit to provide either a portion of the first signal or a portion of the second signal to the radio frequency detector circuit.

7. The signal booster of claim 6 , wherein each of the first tap circuit and the second tap circuit include one or more a resistor, a splitter, a capacitor, and a directional coupler.

8. The signal booster of claim 6 , wherein the radio frequency detector circuit includes one or more of a diode and a log detector.

9. The signal booster of claim 6 , wherein the first signal is a first first-direction signal, the first amplification path is a first first-direction amplification path, the second signal is a second first-direction signal and the second amplification path is a second first-direction amplification path.

10. The signal booster of claim 6 , wherein the first signal is an uplink signal, the first amplification path is an uplink amplification path, the second signal is a downlink signal and the second amplification path is a downlink amplification path.

11. The signal booster of claim 10 , wherein uplink signal and the downlink signal are part of a same communication frequency band in the wireless communication network.

12. The signal booster of claim 6 , further comprising a control unit coupled to the switch circuit and the radio frequency detector circuit, the control unit configured to control the switch circuit and to receive an output from the radio frequency detector circuit.

13. The signal booster of claim 12 , wherein the control unit is configured to adjust a first amplification applied to the first signal in the first amplification path and a second amplification applied to the second signal in the second amplification path based on the output from the radio frequency detector circuit.

14. The signal booster of claim 12 , wherein the switch circuit is a first switch circuit, the signal booster further comprising a second switch circuit coupled between the first switch circuit and the first tap circuit, wherein the control unit is configured to control the second switch circuit such that the second switch circuit is closed only when the first switch circuit is coupled to the first tap circuit.

15. The signal booster of claim 6 , wherein the first amplification path is a first uplink amplification path, the first tap circuit is a first uplink tap circuit, the second amplification path is a second uplink amplification path, the second tap circuit is a second uplink tap circuit, the switch circuit is a first switch circuit, and the radio frequency detector circuit is a first radio frequency detector circuit,

wherein the signal booster further comprises:

a first downlink amplification path that includes a first downlink tap circuit, the first downlink amplification path coupled between the first port and the second port;

a second downlink amplification path that includes a second downlink tap circuit, the second downlink amplification path coupled between the first port and the second port;

a second radio frequency detector circuit; and

a second switch circuit coupled to the first downlink tap circuit, to the second downlink tap circuit, and to second radio frequency detector circuit, the second switch circuit configured to switch between coupling the second radio frequency detector circuit to the first downlink tap circuit and coupling the second radio frequency detector circuit to the second downlink tap circuit.

16. A method, comprising:

amplifying a first signal in a first amplification path coupled between a first port and a second port of a signal booster;

amplifying a second signal in a second amplification path coupled between the first port and the second port of the signal booster;

coupling a radio frequency detector to the first amplification path to detect a power level of the first signal;

decoupling the radio frequency detector from the first amplification path; and

coupling the radio frequency detector to the second amplification path to detect a power level of the second signal.

17. The method of claim 16 , wherein decoupling the radio frequency detector from the first amplification path and coupling the radio frequency detector to the second amplification path occurs while the first signal is amplified by the first amplification path.

18. The method of claim 16 , wherein the first signal is a first first-direction signal, the first amplification path is a first first-direction amplification path, the second signal is a second first-direction signal and the second amplification path is a second first-direction amplification path.

19. The method of claim 16 , wherein the first signal is a first-direction signal, the first amplification path is a first-direction amplification path, the second signal is a second-direction signal and the second amplification path is a second-direction amplification path.

20. The method of claim 16 , further comprising:

controlling the amplification of the first signal in the first amplification path based on the power level of the first signal; and

controlling the amplification of the second signal in the second amplification path based on the power level of the second signal.

Assignments (4)
SECURITY INTEREST Recorded Jun 3, 2022
From: WILSON ELECTRONICS, LLC; ZBOOST, LLC
To: SOUND POINT AGENCY LLC
Reel/Frame 060269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2017
From: WILSON ELECTRONICS, INC.
To: WILSON ELECTRONICS, LLC
Reel/Frame 044402/0281 →
SECURITY INTEREST Recorded Sep 11, 2017
From: WILSON ELECTRONICS, LLC
To: ZB, N.A. DBA ZIONS BANK, AS AGENT
Reel/Frame 043549/0412 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2015
From: ASHWORTH, CHRISTOPHER K.
To: WILSON ELECTRONICS, INC.
Reel/Frame 035414/0845 →
Continuity (1)
Related Publication 20160301371A1 · Oct 13, 2016