Cache coherence directory in multi-processor architectures

1. A method to manage directory information in a die in a multi-processor architecture, the method comprising:

receiving a request, by a directory, for a particular data block, wherein the request is associated with a cache in the die;

updating, by the directory in response to the received request, a first entry in a memory, wherein the first entry is associated with the particular data block, and wherein the first entry corresponds to a number of cache misses experienced by the cache;

updating, by the directory, the number of cache misses for the particular data block to produce an updated number of cache misses for the cache; and

updating, by the directory, a second entry in the memory, wherein the second entry corresponds to the updated number of cache misses for the cache.

2. The method of claim 1 , wherein the request is generated in response to a change in a coherence state of the particular data block.

3. The method of claim 1 , wherein the first entry relates to a last time when an event occurred for the particular data block.

4. The method of claim 3 , wherein the last time of the event is based on an event on a page that includes the particular data block.

5. A method to process a request in a die in a multi-processor architecture, the method comprising:

receiving a request, by a directory, for a particular data block;

analyzing, by the directory, a memory to identify a particular cache indicated as storing the particular data block;

analyzing, by the directory, the memory to identify a number of cache misses for the particular cache;

analyzing, by the directory, the memory to identify a last time when an event occurred for the particular data block or for a page that includes the particular block; and

determining, by the directory, whether to send the request for the particular data block to the particular cache based on the time of the event and the number of cache misses.

6. The method of claim 5 , wherein the number of cache misses is a first number of cache misses, the method further comprising:

analyzing, by the directory, the memory to identify a second number of cache misses for the particular cache.

7. The method of claim 6 , wherein determining whether to send the request for the particular data block to the particular cache is further based on the second number of cache misses.

8. The method of claim 5 , further comprising determining, by the directory, an aging threshold relating to a likelihood that the particular data block is stored in at least one cache in the die, wherein determining whether to send the request for the particular data block is further based on the aging threshold.

9. The method of claim 5 , wherein the time of the event is based on an event in the particular cache.

10. The method of claim 5 , wherein the time of the event is based on an event on a page including the particular data block in the particular cache, or based on an event in another cache in the die.

11. The method of claim 5 , wherein the event is a cache hit or a request to upgrade a coherence state.

12. The method of claim 5 , further comprising evicting, by the directory, an entry in the memory based on the time of the event and the number of cache misses.

13. The method of claim 5 , further comprising evicting, by the directory, an entry in the memory based on the time of the event and the number of cache misses; and

sending a message, by the directory, to invalidate the particular data block from the particular cache.

14. The method of claim 5 , further comprising evicting, by the directory, an entry in the memory based on the time of the event, and the number of cache misses; and

sending, by the directory, a message to invalidate a page including the particular data block from the particular cache.

15. The method of claim 5 , further comprising sending, by the directory, the request to a memory controller based on the time of the event and the number of cache misses.

16. The method of claim 5 , wherein the time of the last event is based on the number of cache misses.

17. A die in a multi-processor architecture, the die comprising:

a first tile including a first cache and a first processor;

a second tile including a second cache and a second processor;

a directory configured to be in communication with the first tile and the second tile, the directory including a memory and a directory controller, the directory controller effective to:

analyze the memory to identify a particular cache from among the first cache and the second cache indicated as storing a particular data block;

at least one of: analyze the memory to identify a last time when an event occurred for the particular data block or for a page that includes the particular data block, analyze the memory to identify a number of cache misses when the event last occurred for the particular block or for the page that includes the particular block, or analyze the memory to identify an approximate number of cache misses when the event last occurred for the particular block or for the page that includes the particular block; and

determine whether to send the request for the particular data block to the particular cache based on at least one of: the time of the event, the number of cache misses, or the approximate number of cache misses.

18. The die of claim 17 , wherein the directory controller is further effective to:

determine an aging threshold relating to a likelihood that the particular data block is stored in one or more caches in the die; and

wherein the determination of whether to send the request for the particular data block to the particular cache is further based on the aging threshold.

19. The die of claim 17 , wherein the event is a cache hit or a request to upgrade a coherence state.

20. A method to process a request in a die in a multi-processor architecture, the method comprising:

receiving a request, by a directory, for a particular data block;

determining, by the directory, an aging threshold relating to a likelihood that data blocks, including the particular data block, are stored in one or more caches in the die;

analyzing, by the directory, a memory to identify a particular cache indicated as storing the particular data block;

analyzing, by the directory, the memory to identify a first number of cache misses for the particular cache;

analyzing, by the directory, the memory to identify a second number of cache misses, wherein the second number of cache misses is related to a number of cache misses since an event last occurred for a page that includes the particular data block; and

determining, by the directory, whether to send the request for the particular data block to the particular cache based on the aging threshold, the time of the event, and the number of cache misses.

21. The method of claim 20 , wherein determining, by the directory, whether to send the request for the particular data block to the particular cache further comprises:

determining whether a difference between the first number of cache misses and the second number of cache misses exceeds the aging threshold.

22. The method of claim 20 , further comprising:

evicting, by the directory, an entry in the memory based on the aging threshold, the first number of cache misses, and the second number of cache misses; and

sending a message, by the directory, to invalidate the particular data block from the particular cache.

23. The method of claim 20 , further comprising:

evicting, by the directory, an entry in the memory based on the aging threshold, the first number of cache misses, and the second number of cache misses; and

sending, by the directory, a message to invalidate the page that includes the particular data block from the particular cache.