IP Library Granted Patent US 9,887,640
Granted Patent B2
US 9,887,640 · App. 14/699,398 · Granted Feb 6, 2018

DC-eliminating current controller for grid-connected DC/AC converters

Inventors: Suzan Eren (Kingston, CA); Majid Pahlevaninezhad (Kingston, CA); Shangzhi Pan (Kingston, CA); Praveen Jain (Kingston, CA)
Assignee: SPARQ SYSTEMS INC.
H02M7/5387H02M7/537H02M1/12H02M1/126H02M2007/4803Y02B70/1441
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Quick Facts
Patent No.
US 9,887,640
App. No.
14/699,398
Granted
Feb 6, 2018
Kind
B2
Abstract

Systems, methods, and devices which eliminate the DC current from the output of grid-connected inverters. A current controller is provided which interfaces with a grid-connected DC/AC inverter. The current controller uses a nonlinear adaptive filter which receives, as input, the output current of the inverter along with grid current frequency. The nonlinear adaptive filter estimates the DC value of the grid current and, in conjunction with an integrator, removes this DC current component. This is done by adjusting the duty cycle of the grid-connected inverter.

Claims (15)

1. A system for controlling a current of a DC/AC converter coupled to a power grid, the system comprising:

a voltage controller block;

a compensation block for providing high gains to a signal at a fundamental frequency of said system and for providing high signal gains at harmonic frequencies of said fundamental frequency, said compensation block receiving at least one version of an output of said voltage controller block;

a nonlinear adaptive filter for estimating a DC component of a grid current using a grid voltage frequency and said grid current, said filter receiving at least one output of said converter, wherein said filter comprises a plurality of processing blocks for processing a first error signal and a second error signal, said first error signal being based on said grid current and an iterative estimation of said DC component, said second error signal being based on said first error signal, wherein said first and second error signals converge to zero and iterative estimations of said DC component are given by {circumflex over ({dot over (θ)})}=γω{tilde over (ξ)} 1 , where {circumflex over ({dot over (θ)})} is said estimation of said DC component, γ is a constant value that determines a speed of convergence for said estimates of said DC component, ω is said grid voltage frequency, and {tilde over (ξ)} 1 is said first error signal; and

circuitry for subtracting said DC component from a current output of said converter by way of controlling a duty cycle for said converter.

2. The system according to claim 1 , wherein said filter receives a grid current output of said converter and a frequency of a grid voltage from said converter.

3. The system according to claim 2 , wherein said frequency of said grid voltage is derived from said grid voltage by a phase locked loop block.

4. The system according to claim 1 , wherein said compensation block receives a grid current from said converter.

5. The system according to claim 1 , wherein said circuitry comprises at least one integration block for integrating said DC component.

6. A method for controlling a grid connected DC/AC converter, the method comprising:

a) receiving a grid current being output by said converter;

b) extracting a grid voltage frequency from a grid voltage being output by said converter;

c) estimating a DC component of said grid current using said grid voltage frequency and said grid current to produce an estimated DC component, wherein said estimating is iteratively based on said grid voltage frequency and at least one error signal, and wherein said at least one error signal is based on said grid voltage frequency and said estimated DC component, and wherein said at least one error signal converges to zero;

d) removing said DC component from said grid current by controlling a duty cycle for said converter.

7. The method according to claim 6 , wherein step d) is performed by way of integration.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: EREN, SUZAN
To: SPARQ SYSTEMS INC.
Reel/Frame 044463/0063 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2017
From: PAHLEVANINEZHAD, MAJID; JAIN, PRAVEEN; PAN, SHANGZHI
To: SPARQ SYSTEMS INC.
Reel/Frame 043716/0564 →
SECURITY INTEREST Recorded Sep 2, 2015
From: SPARQ SYSTEMS INC.
To: COMERICA BANK
Reel/Frame 036476/0088 →
Continuity (2)
Provisional Application 61990841 · May 9, 2014
Related Publication 20150326144A1 · Nov 12, 2015