IP Library Granted Patent US 10,153,386
Granted Patent B2
US 10,153,386 · App. 14/699,574 · Granted Dec 11, 2018

Photovaltaic device conducting layer

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Quick Facts
Patent No.
US 10,153,386
App. No.
14/699,574
Granted
Dec 11, 2018
Kind
B2
Abstract

A multilayered structure may include a doped buffer layer on a transparent conductive oxide layer.

Claims (33)

1. A method of manufacturing a multilayered structure, the method comprising:

forming a doped buffer layer adjacent to a transparent conductive oxide layer, wherein the transparent conductive oxide layer is adjacent to a substrate;

forming a semiconductor absorber layer on the doped buffer layer;

heating the multilayered structure to a temperature sufficient to diffuse dopant from the doped buffer layer into the semiconductor absorber layer; and

diffusing dopant from the doped buffer layer into the semiconductor absorber layer;

wherein the doped buffer layer has more than about 1×10 15 /cm 2 of dopant, and the semiconductor absorber layer has a carrier concentration of greater than 1×10 14 cm −3 after the diffusing.

2. The method of claim 1 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 300 degrees C.

3. The method of claim 1 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 450 degrees C.

4. The method of claim 1 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 600 degrees C.

5. The method of claim 1 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 750 degrees C.

6. The method of claim 1 , wherein the dopant comprises a material selected from the group consisting of copper, arsenic, and antimony.

7. The method of claim 1 , further comprising forming the transparent conductive oxide layer adjacent to the substrate before forming the doped buffer layer.

8. The method of claim 1 , wherein the step of forming a doped buffer layer comprises co-sputtering buffer layer material and dopant from separate sputter targets.

9. The method of claim 4 , wherein the doped buffer layer material comprises tin and the dopant comprises a material selected from the group consisting of copper, arsenic, and antimony.

10. The method of claim 1 , wherein the step of forming a doped buffer layer comprises forming a buffer layer adjacent to the transparent conductive oxide layer and doping the buffer layer with a dopant.

11. The method of claim 1 , wherein the step of forming a doped buffer layer comprises a reactive sputtering process.

12. The method of claim 1 , wherein the step of forming a doped buffer layer comprises atmospheric pressure chemical vapor deposition.

13. The method of claim 1 , further comprising an additional step of heating the transparent conductive oxide stack comprising the transparent conductive oxide layer to anneal the transparent conductive oxide stack.

14. A method of manufacturing a multilayered structure, the method comprising:

forming a doped buffer layer adjacent to a transparent conductive oxide layer, wherein the transparent conductive oxide layer is adjacent to a substrate;

forming a semiconductor absorber layer on the doped buffer layer, wherein the semiconductor absorber layer comprises cadmium telluride;

heating the multilayered structure to a temperature sufficient to diffuse dopant from the buffer layer into the semiconductor absorber layer; and

diffusing dopant from the doped buffer layer into the semiconductor absorber layer;

wherein the dopant comprises arsenic; and

wherein the semiconductor absorber layer has a carrier concentration of greater than 1×10 14 cm −3 after the diffusing.

15. A method of manufacturing a multilayered structure, the method comprising:

forming a doped buffer layer adjacent to a transparent conductive oxide layer, wherein the transparent conductive oxide layer is adjacent to a substrate;

forming a semiconductor absorber layer on the doped buffer layer, wherein the semiconductor absorber layer comprises cadmium telluride;

heating the multilayered structure to a temperature sufficient to diffuse dopant from the buffer layer into the semiconductor absorber layer; and

diffusing dopant from the doped buffer layer into the semiconductor absorber layer;

wherein the dopant comprises antimony; and

wherein the semiconductor absorber layer has a carrier concentration of greater than 1×10 14 cm −3 after the diffusing.

16. The method of claim 1 , wherein the doped buffer layer comprises amorphous tin oxide, zinc tin oxide, zinc oxide, tin silicon oxide, zinc magnesium oxide, or zinc stannate.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Feb 13, 2026
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 074858/0364 →
SECURITY INTEREST Recorded Jul 10, 2023
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 064237/0462 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 15, 2021
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 058132/0566 →
PATENT SECURITY AGREEMENT Recorded Jul 12, 2017
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 043177/0581 →