Pulse generator and driving circuit comprising the same
View Patent ↗A pulse generator includes a first inverter configured to inverse an input pulse and output a result, a second inverter configured to inverse the output of the first inverter and output a result, a clamp inverter configured to generate a clamping voltage by clamping the output of the second inverter and generate an output pulse through a source follower which operates according to the clamping voltage, and a temperature compensator configured to compensate for variations in the clamping voltage caused by temperature change.
1. A pulse generator, comprising:
a first inverter configured to invert an input pulse and output a result;
a second inverter configured to invert the output of the first inverter and output a result;
a clamp inverter configured to generate a clamping voltage by clamping the output of the second inverter and generate an output pulse through a source follower which operates according to the clamping voltage, wherein the clamp inverter includes at least a first Zener diode coupled to the output of the second inverter; and
a temperature compensator configured to compensate for variations in the clamping voltage caused by a temperature change, wherein the temperature compensator is coupled to an anode of the first Zener diode and has a polarity opposite to a temperature coefficient of the first Zener diode according to a temperature rise.
2. The pulse generator of claim 1 , wherein the clamp inverter comprises:
a first zener diode comprising a cathode coupled to the output of the second inverter; and
a first transistor comprising a gate coupled to the output of the second inverter, a first electrode coupled to an output node of the clamp inverter, and a second electrode coupled to a first voltage, wherein the first transistor is configured to implement the source follower.
3. The pulse generator of claim 2 , wherein the clamp inverter further comprises a second zener diode coupled between the output node and a ground.
4. The pulse generator of claim 2 , wherein the clamp inverter further comprises a second transistor coupled between the output node and a ground, wherein the second transistor is configured to switch according to the output of the first inverter.
5. The pulse generator of claim 4 , wherein the first and the second transistors are NMOS transistors.
6. The pulse generator of claim 1 , wherein the temperature compensator comprises a first electrode coupled to a ground, a second electrode coupled to an anode of the first zener diode, and a third transistor which is diode-connected.
7. The pulse generator of claim 6 , wherein the third transistor is a MOSFET.
8. The pulse generator of claim 6 , wherein the third transistor is a BJT.
9. The pulse generator of claim 1 , wherein
the temperature compensator comprises at least one or more diodes comprising an anode coupled to an anode of the first zener diode.
10. The pulse generator of claim 2 , wherein the second inverter comprises:
a fourth transistor coupled between the first voltage and the output of the second inverter, to switch according to the output of the first inverter; and
a fifth transistor coupled between the output of the second inverter and a ground, to switch according to the output of the first inverter.
11. The pulse generator of claim 10 , further comprising a current source coupled between the first voltage and the fourth transistor to supply a constant current.
12. The pulse generator of claim 11 , wherein the current source comprises a first electrode coupled to the first voltage, a second electrode coupled to the fourth transistor, and a sixth transistor comprising a gate to which a predetermined voltage is inputted.
13. The pulse generator of claim 1 , wherein the clamp inverter comprises:
a plurality of diodes coupled between the output of the second inverter and a ground; and
a first transistor comprising a gate coupled to the output of the second inverter, a first electrode coupled to an output node of the clamp inverter, and a second electrode coupled to a first voltage, wherein the first transistor is configured to implement the source follower.
14. The pulse generator of claim 1 , wherein the clamp inverter comprises:
a current source coupled between the output of the second inverter and a ground; and
a first transistor comprising a gate coupled to the output of the second inverter, a first electrode coupled to an output node of the clamp inverter, and a second electrode coupled to a first voltage, wherein the first transistor is configured to implement the source follower.