Current metering for transitioning between operating modes in switching regulators
Current metering for transitioning to low power operation in switching regulators is disclosed. In an exemplary embodiment, a method is provided that includes generating pulse width modulated charging cycles that enable current to flow to an inductor to adjust an output voltage, and detecting a skipped charging cycle. The method also includes determining whether a number of charging cycles are skipped over a time interval that begins when the skipped charging cycle is detected. The method also includes transitioning to a low power operating mode if it determined that the number of charging cycles have been skipped over the selected time interval. During the low power operating mode pulse frequency modulated charging cycles are generated that enable the current to flow to the inductor to generate the output voltage.
1. A method comprising:
generating pulse width modulated (PWM) charging cycles that enable current to flow to an inductor to adjust an output voltage;
detecting a skipped charging cycle;
determining whether a selected number of charging cycles are skipped over a selected time interval that begins when the skipped charging cycle is detected; and
transitioning to a low power operating mode if it is determined that the selected number of charging cycles are skipped over the selected time interval, wherein transitioning to the low power operating mode comprises:
enabling a burst of pulse frequency modulated (PFM) charging cycles that enable current to flow to the inductor to increase the output voltage if it is determined that the output voltage is less than or equal to a nominal level; and
disabling the burst of the pulse frequency modulated (PFM) charging cycles if it is determined that the output voltage is greater than the nominal voltage plus a voltage margin;
generating a minimum on-time based on a ratio of an input voltage to the output voltage utilizing a first factor; and
setting a pulse width of a high side (HS) charging signal to be equal to the minimum on-time during the PFM charging cycles.
2. The method of claim 1 , wherein the operation of generating further comprises synchronizing the PWM charging cycles with a clock frequency.
3. The method of claim 1 , wherein the operation of generating further comprises adjusting a pulse width of the HS charging signal to maintain the output voltage within a selected range.
4. The method of claim 3 , further comprising:
generating a minimum on-time based on a ratio of the input voltage to the output voltage utilizing a second factor; and
adjusting the pulse width of the HS charging signal to be no less than the minimum on-time.
5. The method of claim 1 , wherein the operation of determining comprises setting the selected number of charging cycles to 16.
6. The method of claim 1 , wherein the operation of determining comprises setting the selected time interval to be between 15 and 120 charging cycles.
7. The method of claim 1 , wherein said transitioning comprises skipping pulse frequency modulated (PFM) charging cycles if it is determined that the output voltage is not less than or equal to the nominal level.
8. The method of claim 1 , further comprising transitioning out of the low power mode of operation and return to generating PWM charging cycles if it is determined that the output voltage is less than or equal to an undervoltage level.
9. An apparatus comprising:
a pulse timer that generates pulse width modulated (PWM) charging cycles that enable current to flow to an inductor to adjust an output voltage, wherein the pulse timer adjusts a pulse width of a high side (HS) charging signal to maintain the output voltage within a selected range, wherein the pulse timer enables a burst of pulse frequency modulated (PFM) charging cycles that enable current to flow to the inductor to increase the output voltage if it is determined that the output voltage is less than or equal to a nominal level, and disables the burst of the pulse frequency modulated (PFM) charging cycles if it is determined that the output voltage is greater than the nominal voltage plus a voltage margin;
a mode controller that detects a skipped charging cycle and determines whether a selected number of charging cycles are skipped over a selected time interval that begins when the skipped charging cycle is detected, and wherein the mode controller transitions the apparatus to a low power operating mode if it determined that the selected number of charging cycles are skipped over the selected time interval; and
a minimum on-time generator that generates a minimum on-time based on a ratio of an input voltage to the output voltage utilizing a first factor, and wherein the pulse timer sets a pulse width of the HS charging signal to be equal to the minimum on-time during the PFM charging cycles.
10. The apparatus of claim 9 , wherein the minimum on-time generator that generates a minimum on-time based on a ratio of the input voltage to the output voltage utilizes a second factor, and wherein the pulse timer adjusts the pulse width of the HS charging signal to be no less than the minimum on-time.
11. The apparatus of claim 9 , wherein the mode controller sets the selected number of charging cycles to 16.
12. The apparatus of claim 9 , wherein the mode controller sets the selected time interval to be between 15 and 120 charging cycles.
13. The apparatus of claim 9 , further comprising a cycle skipper that skips pulse frequency modulated (PFM) charging cycles if it is determined that the output voltage is not less than or equal to the nominal level.
14. The apparatus of claim 9 , wherein the mode controller transitions the apparatus out of the low power mode of operation and returns the apparatus to generating PWM charging cycles if it is determined that the output voltage is less than or equal to an undervoltage level.
15. An apparatus comprising:
means for generating pulse width modulated (PWM) charging cycles that enable current to flow to an inductor to adjust an output voltage, wherein the means adjusts a pulse width of a high side (HS) charging signal to maintain the output voltage within a selected range, and wherein the means enables a burst of pulse frequency modulated (PFM) charging cycles that enable current to flow to the inductor to increase the output voltage if it is determined that the output voltage is less than or equal to a nominal level, and disables the burst of the pulse frequency modulated (PFM) charging cycles if it is determined that the output voltage is greater than the nominal voltage plus a voltage margin;
means for detecting a skipped charging cycle, wherein the means determines whether a selected number of charging cycles are skipped over a selected time interval that begins when the skipped charging cycle is detected, and wherein the means causes a low power operating mode to be enabled if it is determined that the selected number of charging cycles are skipped over the selected time interval; and
means for generating a minimum on-time based on a ratio of an input voltage to the output voltage utilizing a factor, wherein the means sets a pulse width of the HS charging signal to be equal to the minimum on-time during the PFM charging cycles.
16. The apparatus of claim 15 , wherein the means for generating charging cycles is a pulse timer, wherein the means for detecting a skipped charging cycle is a mode controller, and wherein the means for generating a minimum on-time is a minimum on-time generator.