Semiconductor device with resistance circuit

1. A semiconductor device, comprising:

a resistance circuit comprising a resistance element comprised of a first thin film arranged on an isolation oxide film provided on a surface of a semiconductor substrate, the first thin film being arranged on the isolation oxide film via an interlayer insulating film, a second thin film comprised of silicon nitride formed on the first thin film so as to be wider than the resistance element, the second thin film overlapping the resistance element so as to be disposed in contact with the interlayer insulating film, an intermediate insulating film of silicon oxide formed on the second thin film, a contact hole passing through the second thin film and being provided in the intermediate insulating film at a depth reaching the first thin film, and a metal wiring formed in the contact hole; and

an insulated gate field effect transistor provided in a region of the semiconductor substrate surrounded by the isolation oxide film.

2. A semiconductor device according to claim 1 ; wherein the first thin film has a thickness of 500 Å or smaller.

3. A semiconductor device according to claim 1 ; wherein the first thin film comprises a first polycrystalline silicon film containing impurities of a first conductivity type at an impurity concentration in a range of 1×10 15 atoms/cm 3 to 5×10 19 atoms/cm 3 .

4. A semiconductor device according to claim 1 ; wherein the first thin film comprises a thin film made of one of CrSi, CrSiN, CrSiO, NiCr, and TiN.

5. A semiconductor device according to claim 1 ; wherein the second thin film has a thickness in the range of 150 Å to 350 Å.

6. A semiconductor device according to claim 5 ; wherein the first thin film has a thickness of 500 Å or smaller.

7. A semiconductor device according to claim 1 ; wherein the first thin film is comprised of polycrystalline silicon.

8. A semiconductor device, comprising:

a semiconductor substrate

an isolation oxide film provided on a surface of the semiconductor substrate;

an insulated gate field effect transistor provided in a region of the semiconductor substrate surrounded by the isolation oxide film; and

a resistance circuit comprising:

a polycrystalline silicon film provided on the isolation oxide film via an interlayer insulating film;

a silicon nitride film formed on the polycrystalline silicon film so as to be wider than and completely overlap the polycrystalline silicon film, the silicon nitride film overlapping the polycrystalline silicon film so as to be disposed in contact with the interlayer insulating film;

a silicon oxide film formed on the silicon nitride film;

a contact hole provided in the silicon oxide film and extending through the silicon nitride film so as to reach the polycrystalline silicon film; and

a metal wiring formed in the contact hole and disposed in contact with the polycrystalline silicon film.

9. A semiconductor device according to claim 8 ; wherein the polycrystalline silicon film has a thickness of 500 Å or smaller.

10. A semiconductor device according to claim 8 ; wherein the polycrystalline silicon film contains impurities of a first conductivity type at an impurity concentration in a range of 1×10 15 atoms/cm 3 to 5×10 19 atoms/cm 3 .

11. A semiconductor device according to claim 8 ; wherein the silicon nitride film has a thickness in the range of 150 Å to 350 Å.

12. A semiconductor device according to claim 11 ; wherein the polycrystalline silicon film has a thickness of 500 Å or smaller.

13. A semiconductor device according to claim 8 ; further comprising another contact hole provided in the silicon oxide film and extending through the silicon nitride film so as to reach the polycrystalline silicon film, and another metal wiring formed in the another contact hole and disposed in contact with the polycrystalline silicon film.

14. A semiconductor device, comprising:

a semiconductor substrate;

an isolation oxide film provided on a surface of the semiconductor substrate;

an insulated gate field effect transistor provided in a region of the semiconductor substrate surrounded by the isolation oxide film; and

a resistance circuit comprising:

a polycrystalline silicon film provided on the isolation oxide film via an interlayer insulating film, the polycrystalline silicon film having a pair of high concentration impurity regions and a low concentration impurity region between the pair of high concentration impurity regions;

a silicon nitride film formed on the polycrystalline silicon film so as to overlap and completely cover the pair of high concentration impurity regions and the low concentration impurity region, the silicon nitride film overlapping the polycrystalline silicon film so as to be disposed in contact with the interlayer insulating film;

a silicon oxide film formed on the silicon nitride film;

a pair of contact holes provided in the silicon oxide film and extending through the silicon nitride film so as to reach the respective pair of high concentration impurity regions of the polycrystalline silicon film; and

a metal wiring formed in each of the contact holes.

15. A semiconductor device according to claim 14 ; wherein the polycrystalline silicon film has a thickness of 500 Å or smaller.

16. A semiconductor device according to claim 14 ; wherein the polycrystalline silicon film contains impurities of a first conductivity type at an impurity concentration in a range of 1×10 15 atoms/cm 3 to 5×10 19 atoms/cm 3 .

17. A semiconductor device according to claim 16 ; wherein the polycrystalline silicon film has a thickness of 500 Å or smaller.

18. A semiconductor device according to claim 14 ; wherein the silicon nitride film has a thickness in the range of 150 Å to 350 Å.