IP Library Granted Patent US 9,589,657
Granted Patent B2
US 9,589,657 · App. 14/723,470 · Granted Mar 7, 2017

Internal power supply voltage auxiliary circuit, semiconductor memory device and semiconductor device

Inventors: Akira Ogawa (Tokyo, JP); Nobuhiko Ito (Tokyo, JP)
Assignee: Powerchip Technology Corporation
G11C16/30G11C5/14G11C7/106G11C7/1039G11C7/1066
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Quick Facts
Patent No.
US 9,589,657
App. No.
14/723,470
Granted
Mar 7, 2017
Kind
B2
Abstract

The disclosure provides an internal power supply voltage auxiliary circuit for an internal power supply voltage generating circuit, wherein the internal power supply voltage generating circuit includes: a differential amplifier, comparing an internal power voltage supplied to a loading circuit with a predetermined reference voltage, and outputting a control voltage from an output terminal; and a driving transistor, driving an external power voltage according to the control voltage. The internal power supply voltage auxiliary circuit includes: a time sequence detecting circuit, detecting a transition of a data signal, generating and outputting a detecting signal; and an internal power voltage auxiliary supplying circuit, auxiliary supplying a current for the loading circuit based on the detecting signal. Therefore, it is possible to output an internal power voltage stably, while power consumption would not increase greatly, even when being used in the semiconductor memory device with the DDR.

Claims (104)

1. An internal power supply voltage auxiliary circuit for an internal power supply voltage generating circuit, the internal power supply voltage generating circuit comprising a differential amplifier and a driving transistor, the differential amplifier comparing an internal power voltage supplied to a loading circuit with a predetermined first reference voltage and outputting a control signal indicating a comparison result from an output terminal, the driving transistor driving an external power voltage according to the control signal and outputting the internal power voltage to the loading circuit via an internal power line, the internal power supply voltage generating circuit adjusting the internal power voltage into the first reference voltage, and the internal power supply voltage auxiliary circuit comprising:

a time sequence detecting circuit, detecting a transition of a data signal, generating and outputting a detecting signal; and

an internal power voltage auxiliary supplying circuit, auxiliary supplying a current for the loading circuit based on the detecting signal.

2. The internal power supply voltage auxiliary circuit according to claim 1 , wherein

the internal power voltage auxiliary supplying circuit comprises:

an auxiliary voltage generating circuit, comprising a first MOS transistor and a second MOS transistor connected in series between the external power voltage and the internal power line; and

a control voltage generating circuit, generating a control voltage for supplying a predetermined current to the internal power line,

the first MOS transistor is controlled according to the detecting signal, and

the second MOS transistor is controlled based on the control voltage to make the predetermined current flow.

3. The internal power supply voltage auxiliary circuit according to claim 2 , wherein

the auxiliary voltage generating circuit further comprises: a charging capacitor, inserted between the first MOS transistor and the second MOS transistor, and charging an electrical charge of the current.

4. The internal power supply voltage auxiliary circuit according to claim 2 , wherein

the control voltage generating circuit generates the control voltage according to a current corresponding to the predetermined current that flow based on the internal power voltage, and the current is flowing based on the external power voltage.

5. The internal power supply voltage auxiliary circuit according to claim 2 , wherein

the control voltage generating circuit comprises:

a regulator control voltage generating circuit, making a current flow to a third MOS transistor and a resistor connected in series to each other between the external power voltage and a ground voltage to generate a control voltage as the control voltage for outputting, and the control voltage being applied to a gate of the third MOS transistor so that a voltage at a connection point between the third MOS transistor and the resistor becomes a predetermined second reference voltage.

6. The internal power supply voltage auxiliary circuit according to claim 5 , wherein

the second reference voltage is identical to the first reference voltage.

7. The internal power supply voltage auxiliary circuit according to claim 5 , wherein

the second reference voltage is lower than or higher than the first reference voltage.

8. The internal power supply voltage auxiliary circuit according to claim 2 , wherein

the control voltage generating circuit generates and outputs the control voltage, wherein the control voltage being applied to a gate of the second MOS transistor so that the internal power voltage of the internal power line becomes a predetermined second reference voltage.

9. The internal power supply voltage auxiliary circuit according to claim 8 , wherein

the second reference voltage is identical to the first reference voltage.

10. The internal power supply voltage auxiliary circuit according to claim 8 , wherein

the second reference voltage is lower than or higher than the first reference voltage.

11. The internal power supply voltage auxiliary circuit according to claim 1 , wherein

the internal power voltage auxiliary supplying circuit comprises:

an auxiliary voltage generating circuit, comprising a resistor and a MOS transistor connected in series between the external power voltage and the internal power line, and

the MOS transistor is controlled according to the detecting signal.

12. The internal power supply voltage auxiliary circuit according to claim 1 , wherein

the internal power voltage auxiliary supplying circuit comprises:

an auxiliary voltage generating circuit, comprising a MOS transistor connected between the external power voltage and the internal power line, and

the MOS transistor is controlled according to the detecting signal.

13. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the time sequence detecting circuit detects transitions of multi-bit data signals, generates and outputs corresponding multi-bit detecting signals, and

the internal power voltage auxiliary supplying circuit comprises a plurality of auxiliary voltage generating circuits connected in parallel and having an amount identical to an amount of the multi-bit detecting signals.

14. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the time sequence detecting circuit detects transitions of multi-bit data signals, generates and outputs corresponding multi-bit detecting signals, and

the internal power supply voltage auxiliary circuit further comprises:

a data migration counting circuit, generating a detecting signal based on the multi-bit detecting signals, and outputting the migrated detecting signal to the internal power voltage auxiliary supplying circuit, and the migrated detecting signal having pulse width corresponding to a number of bits having a predetermined level in the multi-bit detecting signals.

15. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the time sequence detecting circuit detects transitions of multi-bit data signals, generates and outputs corresponding multi-bit detecting signals,

the internal power voltage auxiliary supplying circuit comprises a plurality of auxiliary voltage generating circuits connected in parallel and having an amount identical to an amount of the multi-bit detecting signals, and

the internal power supply voltage auxiliary circuit further comprises:

a comparison circuit, comparing the internal power voltage with a predetermined third reference voltage to generate a comparison result signal, and generating a plurality of different detecting signals based on the comparison result signal and the multi-bit detecting signals, and outputting the different detecting signals to the auxiliary voltage generating circuits.

16. The internal power supply voltage auxiliary circuit according to claim 15 , wherein

the third reference voltage is identical to the first reference voltage.

17. The internal power supply voltage auxiliary circuit according to claim 15 , wherein

the third reference voltage is lower than or higher than the first reference voltage.

18. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the time sequence detecting circuit detects transitions of multi-bit data signals, generates and outputs corresponding multi-bit detecting signals,

the internal power voltage auxiliary supplying circuit comprises a plurality of auxiliary voltage generating circuits connected in parallel and having an amount identical to an amount of the multi-bit detecting signals, and

the internal power supply voltage auxiliary circuit further comprises:

a comparison circuit, comparing the internal power voltage with a predetermined third reference voltage to generate a first comparison result signal, comparing the internal power voltage with a fourth reference voltage different from the third reference voltage to generate a second comparison result signal, and generating a plurality of different detecting signals based on the first comparison result signal, the second comparison result signal and the multi-bit detecting signals, and outputting the different detecting signals to the auxiliary voltage generating circuits.

19. The internal power supply voltage auxiliary circuit according to claim 18 , wherein

the comparison circuit generates a plurality of different detecting signals based on the first comparison result signal, the second comparison result signal, the multi-bit detecting signals and a predetermined case selecting signal, and outputs the different detecting signals to the auxiliary voltage generating circuits, and

the comparison circuit selectively switches, according to the case selecting signal, to compare with the third reference voltage or compare with the fourth reference voltage by drop or rise of the internal power voltage.

20. The internal power supply voltage auxiliary circuit according to claim 18 , wherein

the third reference voltage or the fourth reference voltage is identical to the first reference voltage.

21. The internal power supply voltage auxiliary circuit according to claim 18 , wherein

the third reference voltage is lower than or higher than the first reference voltage.

22. The internal power supply voltage auxiliary circuit according to claim 1 , wherein

the internal power supply voltage auxiliary circuit comprises:

a decoder, decoding a predetermined first multi-bit detecting signal into a decoded detecting signal having a number of bits less than a number of bits in the multi-bit detecting signal;

a plurality of auxiliary voltage generating circuits, each comprising a first MOS transistor and a second MOS transistor connected in series between the external power voltage and the internal power line; and

a plurality of control voltage generating circuits, making a current flow to a third MOS transistor and a resistor connected in series to each other between the external power voltage and a ground voltage in order to generate a control voltage applied to a gate of the third MOS transistor and generate the control voltage applied to a gate of the first MOS transistor corresponding to each of the auxiliary voltage generating circuits, and outputting the control voltages respectively so that a voltage at a connection point between the third MOS transistor and the resistor becomes a predetermined second reference voltage,

the second MOS transistor of each of the auxiliary voltage generating circuits is controlled according to a corresponding bit of the decoded detecting signal, and

the first MOS transistor of each of the auxiliary voltage generating circuits is controlled based on the control voltage from each of the control voltage generating circuits to make a predetermined current flow.

23. The internal power supply voltage auxiliary circuit according to claim 22 , wherein

the auxiliary voltage generating circuit further comprises: a charging capacitor, inserted between the first MOS transistor and the second MOS transistor, and charging an electronic charge of the current.

24. The internal power supply voltage auxiliary circuit according to claim 22 , wherein

the second reference voltage is identical to the first reference voltage.

25. The internal power supply voltage auxiliary circuit according to claim 22 , wherein

the second reference voltage is lower than or higher than the first reference voltage.

26. The internal power supply voltage auxiliary circuit according to claim 22 , wherein

the second reference voltages in the control voltage generating circuits are equal to or different from one another.

27. The internal power supply voltage auxiliary circuit of claim 22 , wherein

resistance values of the resistors in the control voltage generating circuits are equal to or different from one another.

28. The internal power supply voltage auxiliary circuit of claim 11 , wherein

the MOS transistor is a P-type MOS transistor or a N-type MOS transistor.

29. The internal power supply voltage auxiliary circuit according to claim 1 , wherein

the time sequence detecting circuit detects transitions of multi-bit data signals, generates and outputs corresponding multi-bit detecting signals,

the internal power voltage auxiliary supplying circuit comprises an auxiliary voltage generating circuit, the auxiliary voltage generating circuit comprises a predetermined channel MOS transistor and a first N-channel MOS transistor connected in series between the external power voltage and the internal power line,

the internal power voltage auxiliary supplying circuit comprises a control voltage generating circuit, and the control voltage generating circuit makes the current flow to a second N-channel MOS transistor and a resistor connected in series to each other based on the external power voltage and outputs an output voltage of the second N-channel MOS transistor as the control voltage, wherein in the internal power voltage auxiliary supplying circuit,

the predetermined channel MOS transistor is controlled according to the multi-bit detecting signal, and

the first N-channel MOS transistor is controlled based on the control voltage to make a predetermined current flow.

30. The internal power supply voltage auxiliary circuit according to claim 29 , wherein

the predetermined channel MOS transistor is a P-type MOS transistor or a N-type MOS transistor.

31. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the internal power voltage is identical to the external power voltage.

32. The internal power supply voltage auxiliary circuit of claim 1 , wherein

the internal power voltage is lower than or higher than the external power voltage.

33. A semiconductor memory device, comprising the internal power supply voltage auxiliary circuit of claim 1 .

34. The semiconductor memory device of claim 33 , wherein

the semiconductor memory device performs a data writing or a data reading with a speed faster than a clock speed based on a data wiring signal or a data reading signal respectively, and

the time sequence detecting circuit makes the internal power supply voltage auxiliary circuit to operate based on the data writing signal or the data reading signal.

35. The semiconductor memory device of claim 34 , wherein

the speed faster than the clock speed is a double speed of the clock speed which is a double data rate (DDR).

36. A semiconductor device, comprising the internal power supply voltage auxiliary circuit of claim 1 .

37. The internal power supply voltage auxiliary circuit of claim 2 , wherein

the first MOS transistor and the second MOS transistor are P-type MOS transistors or N-type MOS transistors.

38. The internal power supply voltage auxiliary circuit of claim 12 , wherein

the MOS transistor is a P-type MOS transistor or a N-type MOS transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049770/0171 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2015
From: OGAWA, AKIRA; ITO, NOBUHIKO
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 035759/0347 →
Priority Claims (1)
JP 2014-241904 · Nov 28, 2014 · national
Continuity (1)
Related Publication 20160155512A1 · Jun 2, 2016