IP Library Granted Patent US 10,827,178
Granted Patent B2
US 10,827,178 · App. 14/723,573 · Granted Nov 3, 2020

Content aware scheduling in a HEVC decoder operating on a multi-core processor platform

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Quick Facts
Patent No.
US 10,827,178
App. No.
14/723,573
Filed
May 28, 2015
Granted
Nov 3, 2020
Kind
B2
Art Unit
2482
USPC
375/240.02
Abstract

A method is provided for decoding an encoded video stream on a processor having a plurality of processing cores includes receiving and examining a video stream to identify any macroscopic constructs present therein that support parallel processing. Decoding of the video stream is divided into a plurality of decoding functions. The plurality of decoding functions is scheduled for decoding the video stream in a dynamic manner based on availability of any macroscopic constructs that have been identified and then based on a number of bytes used to encode each block into which each picture of the video stream is partitioned. Each of the decoding functions is dispatched to the plurality of processing cores in accordance with the scheduling.

Claims (34)

1. A method of decoding an encoded video stream on a processor having a plurality of processing cores, comprising:

receiving the encoded video stream in a decoder;

examining the video stream in the decoder to identify any macroscopic constructs from syntax elements present therein and bit-rate to determine a threshold that is used for further determining the manner of parallel processing of the video stream, wherein the threshold is derived by determining a time taken for Context Adaptive Binary Arithmetic Coding (CABAC) processing relative to a time taken for decoding remaining parts of the video stream;

dividing decoding of the video stream into a plurality of decoding functions for parallel processing based on the macroscopic constructs when the threshold is not exceeded, wherein the plurality of decoding functions are processed on different parallel cores, processing on each core including CABAC processing and core luma and chroma processing, each of the luma and chroma processing including intra prediction, motion-compensation, inverse transform and inverse quantization and inverse reconstruction processes, and wherein the luma and chroma processing is provided to the different decoder processing cores to provide the plurality of decoding functions;

scheduling the plurality of decoding functions for decoding the video stream in a dynamic manner based on availability of any macroscopic constructs that have been identified and then based on a number of bytes used to encode each block into which each picture of the video stream is partitioned,

wherein the scheduling includes grouping tiles in the video stream into different sets based on the dividing decoding step and scheduling decoding of each set of tiles on a different core, and

wherein each set of tiles has a total number of bytes that are as equal to one another as possible; and

dispatching each of the decoding functions to the plurality of processing cores of the decoder in accordance with the scheduling,

wherein the plurality of decoding functions includes a plurality of atomic decoding functions, the plurality of atomic decoding functions including all of the plurality of decoding functions exclusive of decoding functions applicable to macroscopic constructs, and further comprising scheduling the atomic decoding functions based on the number of bytes used to encode each block into which each picture of the video stream is partitioned,

wherein a threshold number of bytes used to encode each block is used to schedule the atomic decoding functions to be dispatched to different cores,

wherein said atomic functions include CABAC decoding, a remaining part of luma video decoding exclusive of CABAC and in-loop filtering of luma blocks and a remaining part of chroma video decoding exclusive of CABAC and in-loop filtering of chroma blocks, and

wherein when the threshold number of bytes is exceeded, scheduling at least one of (1) the remaining part of luma video coding exclusive of CABAC and in-loop filtering of luma blocks and (2) the remaining part of chroma decoding exclusive of CABAC and in-loop filtering of chroma blocks to a different core from that on which CABAC decoding is performed.

2. The method of claim 1 , wherein the scheduling based on the availability of any macroscopic-constructs includes scheduling based on availability of a prioritized list of macroscopic constructs.

3. The method of claim 2 , wherein the prioritized list of macroscopic constructs, from highest priority to lowest priority, includes tiles, wavefronts and slices within each picture.

4. The method of claim 1 , wherein the video stream includes a number of tiles and the number of tiles is less than a number of cores that are available, and further comprising scheduling decoding of each tile across at least two cores.

5. The method of claim 1 , wherein said atomic functions include CABAC decoding, a remaining part of luma video decoding exclusive of CABAC and in-loop filtering of luma blocks and a remaining part of chroma video decoding exclusive of CABAC and in-loop filtering of chroma blocks.

6. The method of claim 4 , wherein the plurality of decoding functions includes a plurality of atomic decoding functions, the plurality of atomic decoding functions including all of the plurality of decoding functions exclusive of decoding functions applicable to macroscopic constructs, the scheduling of the decoding of each tile across at least two cores further comprising scheduling one or more atomic decoding functions on one core and remaining ones of the plurality of atomic decoding functions on at least one other core.

7. The method of claim 1 , wherein a number of available cores exceeds a number of macroscopic constructs that have been identified, and further comprising scheduling decoding of at least one of the identified macroscopic constructs across at least two cores such that one or more atomic decoding functions are to be performed on one core and remaining ones of the plurality of atomic decoding functions are to be performed on at least one other core.

8. The method of claim 1 , wherein the blocks into which the pictures are partitioned are a CTB, a CB or a superblock.

9. A video decoder, comprising:

a Context Adaptive Binary Arithmetic Coding (CABAC) decoding component for receiving a video bitstream and obtaining syntax elements from the video bitstream;

a core video decoding component including a plurality of processing cores for performing core luma and chroma processing, each of the core luma and chroma processing including intra prediction, motion-compensation, inverse transform, inverse quantization and inverse reconstruction processes;

a multicore processor having a plurality of processing cores to perform decoding;

a scheduler that examines the video bitstream to identify macroscopic constructs and bit-rate to determine a threshold that is used for further determining the manner of parallel processing of the video bitstream, wherein the threshold is derived by determining a time taken for Context Adaptive Binary Arithmetic Coding (CABAC) processing relative to a time taken for decoding remaining parts of the video stream, the scheduler for scheduling CABAC decoding and core luma and chroma for parallel processing to the plurality of processing cores when the threshold is not exceeded based on availability of any macroscopic constructs that have been identified from the syntax elements and then based on a number of bytes used to encode each block into which each picture of the video stream is partitioned,

wherein the luma and chroma processing is divided into the different cores of the plurality of processing cores

wherein the scheduling includes grouping tiles in the video stream into different sets and scheduling decoding of each set of tiles on a different core, and

wherein each set of tiles has a total number of bytes that are as equal to one another as possible; and

a dispatcher for dispatching the CABAC decoding and the core luma and chroma processing to the plurality of processing cores performing decoding in accordance with the scheduling, wherein the dispatching includes dispatching to the plurality of processing cores to provide a plurality of atomic decoding functions, the plurality of atomic decoding functions including all a plurality of decoding functions exclusive of decoding functions applicable to macroscopic constructs, and further comprising scheduling the atomic decoding functions based on the number of bytes used to encode each block into which each picture of the video stream is partitioned,

wherein a threshold number of bytes used to encode each block is used to schedule the atomic decoding functions to be dispatched to different cores,

wherein said atomic functions include CABAC decoding, a remaining part of luma video decoding exclusive of CABAC and in-loop filtering of luma blocks and a remaining part of chroma video decoding exclusive of CABAC and in-loop filtering of chroma blocks, and wherein when the threshold number of bytes is exceeded, scheduling at least one of (1) the remaining part of luma video coding exclusive of CABAC and in-loop filtering of luma blocks and (2) the remaining part of chroma decoding exclusive of CABAC and in-loop filtering of chroma blocks to a different core from that on which CABAC decoding is performed.

10. The video decoder of claim 9 , wherein a threshold number of bytes used to encode each block is used to schedule the CABAC decoding and the core luma and chroma processing.

11. The video decoder of claim 10 wherein the threshold number of bytes is exceeded and further comprising scheduling the core luma and chroma processing to a different core from that on which CABAC decoding is performed.

12. The video decoder of claim 9 , wherein the video stream includes a number of tiles and the number of tiles is less than a number of processing cores that are available on the multicore processor, and further comprising scheduling decoding of each tile across at least two cores.

13. The method of claim 1 , wherein CABAC processing is followed by other video operations comprising one or more of: intra prediction, motion compensation, filtering, inverse quantization, and inverse transform associated with luma and chroma, the other video operations performed before decoding.

Assignments (10)
RELEASE OF SECURITY INTEREST AT REEL/FRAME 049905/0504 Recorded Dec 19, 2024
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: ARRIS ENTERPRISES LLC (F/K/A ARRIS ENTERPRISES, INC.); ARRIS TECHNOLOGY, INC.; ARRIS SOLUTIONS, INC.; COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; RUCKUS WIRELESS, LLC (F/K/A RUCKUS WIRELESS, INC.)
Reel/Frame 071477/0255 →
SECURITY INTEREST Recorded Dec 17, 2024
From: ARRIS ENTERPRISES LLC; COMMSCOPE TECHNOLOGIES LLC; COMMSCOPE INC., OF NORTH CAROLINA; OUTDOOR WIRELESS NETWORKS LLC; RUCKUS IP HOLDINGS LLC
To: APOLLO ADMINISTRATIVE AGENCY LLC
Reel/Frame 069889/0114 →
SECURITY INTEREST Recorded Nov 19, 2021
From: ARRIS SOLUTIONS, INC.; ARRIS ENTERPRISES LLC; COMMSCOPE TECHNOLOGIES LLC; COMMSCOPE, INC. OF NORTH CAROLINA; RUCKUS WIRELESS, INC.
To: WILMINGTON TRUST
Reel/Frame 060752/0001 →
ABL SECURITY AGREEMENT Recorded Jul 3, 2019
From: COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; ARRIS ENTERPRISES LLC; ARRIS TECHNOLOGY, INC.; RUCKUS WIRELESS, INC.; ARRIS SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 049892/0396 →
PATENT SECURITY AGREEMENT Recorded Jul 3, 2019
From: ARRIS ENTERPRISES LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 049820/0495 →
TERM LOAN SECURITY AGREEMENT Recorded Jul 3, 2019
From: COMMSCOPE, INC. OF NORTH CAROLINA; COMMSCOPE TECHNOLOGIES LLC; ARRIS ENTERPRISES LLC; ARRIS TECHNOLOGY, INC.; RUCKUS WIRELESS, INC.; ARRIS SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 049905/0504 →
CHANGE OF NAME Recorded Jun 25, 2019
From: ARRIS ENTERPRISES, INC.
To: ARRIS ENTERPRISES LLC
Reel/Frame 049586/0470 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Apr 8, 2019
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: ARRIS GROUP, INC.; ARRIS ENTERPRISES, INC.; ARRIS INTERNATIONAL LIMITED; ARRIS TECHNOLOGY, INC.; ARCHIE U.S. MERGER LLC; ARCHIE U.S. HOLDINGS LLC; ARRIS GLOBAL SERVICES, INC.; ARRIS HOLDINGS CORP. OF ILLINOIS, INC.; ARRIS SOLUTIONS, INC.; BIG BAND NETWORKS, INC.; TEXSCAN CORPORATION; POWER GUARD, INC.; JERROLD DC RADIO, INC.; NEXTLEVEL SYSTEMS (PUERTO RICO), INC.; GIC INTERNATIONAL HOLDCO LLC; GIC INTERNATIONAL CAPITAL LLC
Reel/Frame 050721/0401 →
CHANGE OF NAME Recorded Mar 14, 2017
From: ARRIS ENTERPRISES INC
To: ARRIS ENTERPRISES LLC
Reel/Frame 041995/0031 →
SECURITY INTEREST Recorded Jun 26, 2015
From: ARRIS GROUP, INC.; ARRIS ENTERPRISES, INC.; ARRIS INTERNATIONAL LIMITED; ARRIS TECHNOLOGY, INC.; ARCHIE U.S. MERGER LLC; ARCHIE U.S. HOLDINGS LLC; ARRIS GLOBAL SERVICES, INC.; ARRIS HOLDINGS CORP. OF ILLINOIS, INC.; ARRIS SOLUTIONS, INC.; BIG BAND NETWORKS, INC.; TEXSCAN CORPORATION; POWER GUARD, INC.; JERROLD DC RADIO, INC.; NEXTLEVEL SYSTEMS (PUERTO RICO), INC.; GIC INTERNATIONAL HOLDCO LLC; GIC INTERNATIONAL CAPITAL LLC
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 036020/0789 →