Semiconductor device

1. A semiconductor device comprising:

a semiconductor chip;

a plurality of IO cells arranged along an edge portion of said semiconductor chip; and

a reference voltage generation circuit, mounted on said semiconductor chip, for receiving a power supply voltage supplied to an external power supply terminal and generating a reference voltage, wherein

some elements forming said reference voltage generation circuit being arranged in a first corner region of said semiconductor chip,

remaining elements forming said reference voltage generation circuit being arranged in a core region on an inner side of the edge portion of said semiconductor chip, and

among a plurality of corner regions, said first corner region being located closest to said remaining elements.

2. The semiconductor device according to claim 1 , wherein said some elements forming said reference voltage generation circuit include a low pass filter connected to said external power supply terminal.

3. The semiconductor device according to claim 1 , wherein said some elements forming said reference voltage generation circuit include a resistance element included in a startup circuit of a constant current generation circuit.

4. The semiconductor device according to claim 1 , wherein said some elements forming said reference voltage generation circuit include an element for output stabilization.

5. A semiconductor device comprising:

a semiconductor chip;

a plurality of IO cells arranged along an edge portion of said semiconductor chip; and

a first circuit and a second circuit mounted on said semiconductor chip and connected to each other, wherein

some elements forming said first circuit being arranged in a first corner region of said semiconductor chip,

some elements forming said second circuit being arranged in a second corner region of said semiconductor chip, and

remaining elements forming said first circuit and remaining elements forming said second circuit being arranged in a core region on an inner side of the edge portion of said semiconductor chip.

6. The semiconductor device according to claim 5 , wherein

the remaining elements forming said first circuit and the remaining elements forming said second circuit are arranged in a first region within said core region,

among a plurality of corner regions, said first corner region is located closest to said first region, and

said second corner region is a corner region other than said first corner region in the plurality of corner regions.

7. The semiconductor device according to claim 6 , wherein elements arranged in said second corner region and some of elements arranged in said first region are connected through a pad within one of said IO cells and a wiring line.

8. The semiconductor device according to claim 6 , wherein

said first circuit is a reference voltage generation circuit that receives a power supply voltage supplied to an external power supply terminal and generates a reference voltage, and

said second circuit is a power-on reset circuit.

9. The semiconductor device according to claim 8 , wherein said some elements of said second circuit include a capacitive element included in a delay circuit.

10. The semiconductor device according to claim 8 , wherein said some elements of said second circuit include a pulse filter.

11. The semiconductor device according to claim 8 , further comprising a burn-in test circuit mounted on said semiconductor chip, wherein

said burn-in test circuit is arranged in said second corner region.

12. The semiconductor device according to claim 8 , further comprising a monitor circuit mounted on said semiconductor chip and monitoring said reference voltage, wherein

an element for output stabilization within said monitor circuit is arranged in said first corner region.

13. The semiconductor device according to claim 8 , further comprising a monitor circuit mounted on said semiconductor chip and monitoring an internal power supply voltage, wherein

said monitor circuit is arranged in said second corner region.

14. The semiconductor device according to claim 8 , further comprising an external voltage monitoring circuit mounted on said semiconductor chip, wherein

a voltage-dividing circuit included in said external voltage monitoring circuit is arranged in said first corner region.

15. The semiconductor device according to claim 8 , further comprising an external voltage monitoring circuit mounted on said semiconductor chip, wherein

a pulse filter included in said external voltage monitoring circuit is arranged in said second corner region.

16. The semiconductor device according to claim 8 , further comprising an internal voltage monitoring circuit, mounted on said semiconductor chip, for receiving the power supply voltage supplied to the external power supply terminal and monitoring an internal voltage, wherein

some elements forming said internal voltage monitoring circuit are arranged in a third corner region of said semiconductor chip,

remaining elements forming said internal voltage monitoring circuit are arranged in a second region within said core region, and

among a plurality of corner regions, said third corner region is located closest to said second region.

17. The semiconductor device according to claim 16 , wherein each element of the some elements forming said internal voltage monitoring circuit each is a low pass filter connected to said external power supply terminal.

18. The semiconductor device according to claim 16 , wherein each element of the some elements forming said internal voltage monitoring circuit each is an element for output stabilization.