IP Library Granted Patent US 10,367,525
Granted Patent B2
US 10,367,525 · App. 14/725,914 · Granted Jul 30, 2019

Incremental loop modification for LDPC encoding

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Quick Facts
Patent No.
US 10,367,525
App. No.
14/725,914
Granted
Jul 30, 2019
Kind
B2
Abstract

Techniques are disclosed relating to encoding communications. In some embodiments, for different rows of an encoding matrix, the following operations are performed: generate a set of operations for entries in the row, where the set of operations includes respective operations to be performed on the entries for multiplication of the matrix by a vector, propagate values of entries in the encoding matrix into the set of operations, and simplify ones of the set of operations based on the propagated values to generate an output set of operations. In some embodiments, the output sets of operations are usable to encode input data for communication over a medium. In some embodiments, the disclosed techniques facilitate loop unrolling within compiler memory constraints. In some embodiments, an apparatus (e.g., a mobile device) is configured with the output sets of operations.

Claims (48)

1. An apparatus, comprising:

one or more memories; and

one or more processing elements;

wherein the apparatus is configured with a set of operations usable to produce an encoded message based on an input message;

wherein the apparatus is configured to:

encode a message using the set of operations; and

wirelessly transmit the encoded message; and

wherein the set of operations corresponds to operations generated, based on an encoding

matrix by separately performing, for different rows in the encoding matrix:

generating a set of operations for entries in the row, wherein the set of operations

for entries in the row includes respective operations to be performed on the entries for multiplication of the encoding matrix by a vector;

propagating values of entries in the matrix into the set of operations for entries in the row; and

simplifying ones of the set of operations based on the propagated values to generate an output set of operations for the row.

2. The apparatus of claim 1 , wherein the set of operations for each row is specified by an inner loop and iteration through the rows is specified by an outer loop, wherein the separately performing includes unrolling the inner and outer loops.

3. The apparatus of claim 1 , wherein the separately performing is performed iteratively.

4. The apparatus of claim 1 , wherein the encoding matrix is a low-density parity check (LDPC) matrix and wherein the apparatus is configured to transmit the encoded message to a storage device for storage of the encoded message.

5. The apparatus of claim 1 , wherein the encoding matrix is a smaller representation of an LDPC matrix that specifies locations of non-zero entries in the LDPC matrix.

6. A method, comprising:

receiving first encoding data that corresponds to an encoding matrix;

separately performing, for different rows in the encoding matrix:

generating a set of operations for entries in the row, wherein the set of operations

includes respective operations to be performed on the entries for multiplication of the matrix by a vector;

propagating values of entries in the encoding matrix into the set of operations; and

simplifying ones of the set of operations based on the propagated values to generate an output set of operations; and

configuring circuitry to perform the output sets of operations to encode input data for wireless communication over a medium.

7. The method of claim 6 , further comprising:

encoding a message using the output sets of operations; and

transmitting the encoded message.

8. The method of claim 6 , wherein the configuring the circuitry includes programming logic of a programmable hardware device.

9. The method of claim 6 , wherein the configuring the circuitry includes fabricating an integrated circuit.

10. The method of claim 6 , wherein the encoding matrix is a smaller representation of a low-density parity-check (LDPC) matrix, wherein the smaller representation specifies locations of non-zero entries in the LDPC matrix.

11. The method of claim 6 , wherein the first encoding data specifies the set of operations for each row using an inner loop and specifies iteration through the rows using an outer loop, wherein the separately performing includes unrolling the inner and outer loops.

12. The method of claim 6 , wherein the separately performing is performed iteratively.

13. The method of claim 6 , wherein the encoding matrix is a low-density parity check (LDPC) matrix.

14. A non-transitory computer-readable medium having instructions stored thereon that are executable by a computing system to cause the computing system to perform operations comprising:

receiving first encoding data that corresponds to an encoding matrix;

separately performing, for different rows in the encoding matrix:

generating a set of operations for entries in the row, wherein the set of operations

includes respective operations to be performed on the entries for multiplication of the matrix by a vector;

propagating values of entries in the encoding matrix into the set of operations; and

simplifying ones of the set of operations based on the propagated values to generate an output set of operations; and

configuring circuitry to perform the output sets of operations to encode input data for wireless communication over a medium.

15. The non-transitory computer-readable medium of claim 14 , wherein the operations further comprise:

encoding a message using the output sets of operations; and

transmitting the encoded message.

16. The non-transitory computer-readable medium of claim 14 , wherein the encoding matrix is a smaller representation of a low-density parity-check (LDPC) matrix, wherein the smaller representation specifies locations of non-zero entries in the LDPC matrix.

17. The non-transitory computer-readable medium of claim 14 , wherein the first encoding data specifies the set of operations for each row using an inner loop and specifies iteration through the rows using an outer loop, wherein the separately performing includes unrolling the inner and outer loops.

18. The non-transitory computer-readable medium of claim 14 , wherein the separately performing is performed iteratively.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2015
From: ULIANA, DAVID C.; PETERSEN, NEWTON G.; LY, TAI A.; KEE, HOJIN; ARNESEN, ADAM T.; BLASIG, DUSTYN K.; GUMENJAV, GANDIINAA
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 035746/0913 →